Which of the following is hardware interrupts?
a) RST5.5, RST6.5, RST7.5 b) INTR, TRAP c) a & b

1 Answer

Answer :

c) a & b

Related questions

Description : What are level Triggering interrupts? a) INTR&TRAP b)RST6.5&RST5.5 c)RST7.5&RST6.5

Last Answer : b)RST6.5&RST5.5

Description : In 8086, Example for Non maskable interrupts are a) Trapb) RST6.5 c) INTR

Last Answer : a) Trap

Description : Which interrupt has the highest priority? a) INTR b) TRAP c) RST6.5

Last Answer : c) RST6.5

Description : What are software interrupts? a) RST 0 - 7 b) RST 5.5 - 7.5 c) INTR, TRAP

Last Answer : a) RST 0

Description : Which interrupt is not level sensitive in 8085? a) RST6.5 is a raising edge-trigging interrupt. b) RST7.5 is a raising edge-trigging interrupt. c) a & b.

Last Answer : b) RST7.5 is a raising edge-trigging interrupt.

Description : What is the RST for the TRAP? a) RST5.5 b) RST4.5 c) RST4

Last Answer : b) RST4.5

Description : What Are The Two Major Differences Between Intr And Other Interrupts ( Hardware)?

Last Answer : Answer :The two major differences between INTR and the other hardware interrupts are as follows:All the hardware interrupts are vectored interrupts but the INTR interrupt is not so. An INTR interrupt will ... saved but in the case of other hardware interrupts the locations is saved in the stack.

Description : Which of the following 8085 microprocessor hardware interrupt has the lowest priority? (A) RST 6.5 (B) RST 7.5 (C) TRAP (D) INTR 

Last Answer : Answer: D

Description : Interrupts which are initiated by an instruction are a. internal b. external c. hardware d. software

Last Answer : b. external

Description : Interrupts which are initiated by an instruction are a. internal b. external c. hardware d. software

Last Answer : d. software

Description : The number of software interrupts in 8085 is ____ a) 5 b) 8

Last Answer : b) 8

Description : How many interrupts does 8085 have, mention them

Last Answer : The 8085 has 5 interrupt signals; they are INTR, RST7.5, RST6.5, RST5.5 and TRAP

Description : Explain priority interrupts of 8085.

Last Answer : The 8085 microprocessor has five interrupt inputs. They are TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR. These interrupts have a fixed priority of interrupt service. If two or more interrupts go ... 8085 is shown in the table. Interrupts Priority TRAP RST 7.5 RST 6.5 RST 5.5 INTR

Description : Interrupts which are initiated by an I/O drive are a. internal b. external c. software d. all of above

Last Answer : b. external

Description : What type of control pins are needed in a microprocessor to regulate traffic on the bus, in order to prevent two devices from trying to use it at the same time? a. Bus control b. Interrupts c. Bus arbitration d. Status

Last Answer : c. Bus arbitration

Description : Which is used to store critical pieces of data during subroutines and interrupts: a. Stack b. Queue c. Accumulator d. Data register

Last Answer : a. Stack

Description : 8086 is interfaced to two 8259s (Programmable interrupt controllers). If 8259s are in master slave configuration the number of interrupts available to the 8086 microprocessor is a) 8 b) 16 c) 15 d) 64

Last Answer : a) 8

Description : n 8086 microprocessor the following has the highest priority among all type interrupts. a) NMI b) DIV 0 c) TYPE 255 d) OVER FLOW

Last Answer : a) NMI

Description : What is meant by Maskable interrupts? a) An interrupt which can never be turned off. b) An interrupt that can be turned off by the programmer. c) none

Last Answer : b) An interrupt that can be turned off by the programmer.

Description : Vector address of TRAP a) 24H b) 36H c) 24 d) 18H

Last Answer : c) 24

Description : Address line for TRAP is? a) 0023H b) 0024H c) 0033H

Last Answer : b) 0024H

Description : 8085 microprocessor has ............. hardware interrupts. (A) 2 (B) 3 (C) 4 (D) 5

Last Answer : (D) 5

Description : Interrupts that are initiated by an instruction are_______ A. internal B. external C. hardware D. software

Last Answer : D. software

Description : What Are Hardware Interrupts?

Last Answer : Answer :TRAP, RST7.5, RST6.5, RST5.5, INTR.

Description : Computer professionals working in a computer center are` a. Software b. Firmware c. Hardware d. Humanware

Last Answer : d. Humanware

Description : The personnel who deals with the computer and its management put together are called a. Software b. Human ware c. Firmware d. Hardware

Last Answer : b. Human ware

Description : User programmable terminals that combine VDT hardware with built-in microprocessor is a. Kips b. PC c. Mainframe d. Intelligent terminals

Last Answer : d. Intelligent terminals

Description : The use of spooler programs and/or …. Hardware allows personal computer operators to do the processing work at the same time a printing operation is in progress a. Registered mails b. Memory c. CPU d. Buffer

Last Answer : d. Buffer

Description : Regarding a VDU, Which statement is more correct? a. It is an output device b. It is an input device c. It is a peripheral device d. It is hardware item

Last Answer : c. It is a peripheral device

Description : An error in software or hardware is called a bug. What is the alternative computer jargon for it? a. Leech b. Squid c. Slug d. Glitch

Last Answer : d. Glitch

Description : Human beings are referred to as Homosapinens, which device is called Sillico Sapiens? a. Monitor b. Hardware c. Robot d. Computer

Last Answer : d. Computer

Description : Software in computer a. Enhances the capabilities of the hardware machine b. Increase the speed of central processing unit c. Both of above d. None of above

Last Answer : a. Enhances the capabilities of the hardware machine

Description : The DMA controllers are special hardware embedded into the chip in modern integrate processor that ____and_____ to the system; a. Data transfer b. arbitrate access c. Both A and B d. None of these

Last Answer : c. Both A and B

Description : If you are to use [Control-c] as the interrupt key instead of [Del], then you will have to use A. tty ^c B. stty intr \^c C. stty echoe D. stty echo \^a E. None of the above

Last Answer : B. stty intr \^c

Description : Explain Briefly What Happens When The Intr Signal Goes High In The 8085?

Last Answer : Answer :The INTR is a maskable interrupt for the 8085. It has the lowest priority and is also non vectored. When this INTR signal goes into the high state the following things occur / ... the processor saves the address of new instruction into the STACK and an interrupt service subroutine begins.

Description : Explain ALIGN & ASSUME

Last Answer : The ALIGN directive forces the assembler to align the nextsegment at an address divisible by specified divisor. The format is ALIGN number where number can be 2, 4, 8 or 16. Example ALIGN 8. The ASSUME ... the segment registers at execution time. Example ASSUME CS: code, DS: data, SS: stack

Description : What is Microprocessor? Give the power supply & clock frequency of 8085

Last Answer : A microprocessor is a multipurpose, programmable logic device that reads binary instructions from a storage device called memory accepts binary data as input and processes data according ... provides result as output. The power supply of 8085 is +5V and clock frequency in 3MHz.

Description : Which is not the open-source OS: a. Debian b. BSD Unix c. Gentoo & Red Hat Linux d. Windows

Last Answer : d. Windows

Description : Which is not the main architectural feature of Power PC: a. It is not based on RISC b. Superscalar implementation c. Both 32 & 64 Bit d. Paged Memory management architecture

Last Answer : a. It is not based on RISC

Description : Pentium Pro Processor contains: a. L1 Cache b. L2 Cache c. Both L1 & L2 d. None of these

Last Answer : c. Both L1 & L2

Description : Where was India’s first computer installed and when? a. Indian Institute of Technology, Delhi, 1977 b. Indian Institute of Science, Bangalore, 1971 c. Indian Iron & Steel Co. Ltd., 1968 d. Indian Statistical Institute, Calcutta, 1955

Last Answer : d. Indian Statistical Institute, Calcutta, 1955

Description : SAM stands for: a. Simple architecture machine b. Solved architecture machine c. Both a & b d. None of these

Last Answer : a. Simple architecture machine

Description : The problem of bus confect and sparse address distribution are eliminated by the use of ______ address technique: a. Fully decoding b. Half decoding c. Both a & b d. None of these

Last Answer : a. Fully decoding

Description : CPU can read & write data by using : a. Control bus b. Data bus c. Address bus d. None of these

Last Answer : b. Data bus

Description : Which Bus connects CPU & level 2 cache: a. Rear side bus b. Front side bus c. Memory side bus d. None of these

Last Answer : b. Front side bus

Description : The structure of the stack is _______ type structure: a. First in last out b. Last in last out c. Both a & b d. None of these

Last Answer : a. First in last out

Description : Which is the important part of a combinational logic block: a. Index register b. Barrel shifter c. Both a & b d. None of these

Last Answer : b. Barrel shifter

Description : The processor uses the stack to keep track of where the items are stored on it this by using the: a. Stack pointer register b. Queue pointer register c. Both a & b d. None of these

Last Answer : a. Stack pointer register

Description : BCD stands for: a. Binary coded decimal b. Binary coded decoded c. Both a & b d. none of these

Last Answer : a. Binary coded decimal

Description : ______ input is available, so that another coprocessor can be connected and function in _________ with the 8087. . a) RQ/GT0, parallel b) RQ/GT1, parallel c) QS1 & QS0, parallel d) S0 & S1, parallel.

Last Answer : a) RQ/GT0, parallel