Interrupts which are initiated by an instruction are
a. internal
b. external
c. hardware
d. software

1 Answer

Answer :

b. external

Related questions

Description : Interrupts which are initiated by an instruction are a. internal b. external c. hardware d. software

Last Answer : d. software

Description : Interrupts that are initiated by an instruction are_______ A. internal B. external C. hardware D. software

Last Answer : D. software

Description : Interrupts which are initiated by an I/O drive are a. internal b. external c. software d. all of above

Last Answer : b. external

Description : Interrupts which are initiated by an I/O drive are ___________ A. internal B. external C. Both (A) and (B) D. All of the above

Last Answer : B. external

Description : Which of the following is hardware interrupts? a) RST5.5, RST6.5, RST7.5 b) INTR, TRAP c) a & b

Last Answer : c) a & b

Description : The number of software interrupts in 8085 is ____ a) 5 b) 8

Last Answer : b) 8

Description : What are software interrupts? a) RST 0 - 7 b) RST 5.5 - 7.5 c) INTR, TRAP

Last Answer : a) RST 0

Description : What is the function of watchdog timer? a) The watchdog Timer is an external timer that resets the system if the software fails to operate properly. b) The watchdog Timer is an internal timer ... internal timer that resets the system if the software fails to operate properly. d) None of them

Last Answer : b) The watchdog Timer is an internal timer that sets the system if the software fails to operate properly.

Description : What is the function of watchdog timer? a) The watchdog Timer is an external timer that resets the system if the software fails to operate properly. b) The watchdog Timer is an internal timer ... internal timer that resets the system if the software fails to operate properly. d) None of them

Last Answer : c) The watchdog Timer is an internal timer that resets the system if the software fails to operate properly.

Description : Which of the following instruction perform the move accumulator to external RAM of 16bit address? a) MOV @ DPTR, A b) MOVX @ Ri, A c) MOV A, @ Ri d) MOVX @ DPTR, A

Last Answer : c) MOV A, @ Ri

Description : How many interrupts does 8085 have, mention them

Last Answer : The 8085 has 5 interrupt signals; they are INTR, RST7.5, RST6.5, RST5.5 and TRAP

Description : Explain priority interrupts of 8085.

Last Answer : The 8085 microprocessor has five interrupt inputs. They are TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR. These interrupts have a fixed priority of interrupt service. If two or more interrupts go ... 8085 is shown in the table. Interrupts Priority TRAP RST 7.5 RST 6.5 RST 5.5 INTR

Description : What type of control pins are needed in a microprocessor to regulate traffic on the bus, in order to prevent two devices from trying to use it at the same time? a. Bus control b. Interrupts c. Bus arbitration d. Status

Last Answer : c. Bus arbitration

Description : Which is used to store critical pieces of data during subroutines and interrupts: a. Stack b. Queue c. Accumulator d. Data register

Last Answer : a. Stack

Description : 8086 is interfaced to two 8259s (Programmable interrupt controllers). If 8259s are in master slave configuration the number of interrupts available to the 8086 microprocessor is a) 8 b) 16 c) 15 d) 64

Last Answer : a) 8

Description : n 8086 microprocessor the following has the highest priority among all type interrupts. a) NMI b) DIV 0 c) TYPE 255 d) OVER FLOW

Last Answer : a) NMI

Description : In 8086, Example for Non maskable interrupts are a) Trapb) RST6.5 c) INTR

Last Answer : a) Trap

Description : What is meant by Maskable interrupts? a) An interrupt which can never be turned off. b) An interrupt that can be turned off by the programmer. c) none

Last Answer : b) An interrupt that can be turned off by the programmer.

Description : What are level Triggering interrupts? a) INTR&TRAP b)RST6.5&RST5.5 c)RST7.5&RST6.5

Last Answer : b)RST6.5&RST5.5

Description : Computer professionals working in a computer center are` a. Software b. Firmware c. Hardware d. Humanware

Last Answer : d. Humanware

Description : The personnel who deals with the computer and its management put together are called a. Software b. Human ware c. Firmware d. Hardware

Last Answer : b. Human ware

Description : An error in software or hardware is called a bug. What is the alternative computer jargon for it? a. Leech b. Squid c. Slug d. Glitch

Last Answer : d. Glitch

Description : Software in computer a. Enhances the capabilities of the hardware machine b. Increase the speed of central processing unit c. Both of above d. None of above

Last Answer : a. Enhances the capabilities of the hardware machine

Description : Interrupt which arises from illegal or erroneous use of an instruction or data is (A) Software interrupt (B) Internal interrupt (C) External interrupt (D) All of the above

Last Answer : (B) Internal interrupt

Description : 8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH 17. If the __ pin is ___ , then we have the option ... b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal

Last Answer : c) EA, high, external, internal

Description : If the __ pin is ___ , then we have the option of using the ____ ROM or EPROM together with _____ memory and devices. a) EA, high, internal, external b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal

Last Answer : a) EA, high, internal, external

Description : is an external hardware event which causes the CPU to interrupt the current instruction sequence: a. Input interrupt b. Output interrupt c. Both d. None of these

Last Answer : c. Both

Description : What Are The Two Major Differences Between Intr And Other Interrupts ( Hardware)?

Last Answer : Answer :The two major differences between INTR and the other hardware interrupts are as follows:All the hardware interrupts are vectored interrupts but the INTR interrupt is not so. An INTR interrupt will ... saved but in the case of other hardware interrupts the locations is saved in the stack.

Description : What Are Hardware Interrupts?

Last Answer : Answer :TRAP, RST7.5, RST6.5, RST5.5, INTR.

Description : 8085 microprocessor has ............. hardware interrupts. (A) 2 (B) 3 (C) 4 (D) 5

Last Answer : (D) 5

Description : How does the microprocessor differentiate between data and instruction

Last Answer : When the first m/c code of an instruction is fetched and decoded in the instruction register, the microprocessor recognizes the number of bytes required to fetch the entire ... will be considered as data & the byte after the data will be treated as the next instruction.

Description : Why do we use XRA A instruction

Last Answer : The XRA A instruction is used to clear the contents of the Accumulator and store the value 00H.

Description : Explain the different instruction formats with examples

Last Answer : The instruction set is grouped into the following formats • One byte instruction MOV C,A • Two byte instruction MVI A,39H • Three byte instruction JMP 2345H

Description : Mention the categories of instruction and give two examples for each category

Last Answer : The instructions of 8085 can be categorized into the following five • Data transfer MOV Rd,Rs STA 16-bit • Arithmetic ADD R DCR M • Logical XRI 8-bit RAR • Branching JNZ CALL 16-bit • Machine control HLT NOP

Description : What is an instruction?

Last Answer : An instruction is a binary pattern entered through an input device to command the microprocessor to perform that specific function

Description : Define instruction cycle, machine cycle and T-state

Last Answer : Instruction cycle is defined, as the time required completing theexecution of an instruction. Machine cycle is defined as the time required completing one operation of accessing memory, I/O or ... request. Tcycle is defined as one subdivision of the operation performed in one clock period

Description : Explain the difference between a JMP instruction and CALL instruction.

Last Answer : A JMP instruction permanently changes the program counter. A CALL instruction leaves information on the stack so that the original program execution sequence can be resumed.

Description : How many operations are there in the instruction set of 8085 microprocessor?

Last Answer : There are 74 operations in the 8085 microprocessor.

Description : CISC stands for: a. Complex instruction set computer b. Camper instruct set of computer c. Compared instruction set computer d. None of these

Last Answer : a. Complex instruction set computer

Description : RISC stands for: a. Reduced Instruction set computer b. Reduced Instruct set compare c. Reduced instruction stands computer d. All of these 107. DEC stands for:

Last Answer : a. Reduced Instruction set computer

Description : ISA stands for: a. Instruct set area b. Instruction set architecture c. Both a and b d. None of these

Last Answer : b. Instruction set architecture

Description : Which is not the main feature of DEC Alpha: a. 64 Bit RISC processor b. Designed to replace 32 VAX(CISC) c. Seven stage split integer/floating point pipeline d. Variable Instruction length

Last Answer : d. Variable Instruction length

Description : How many speed of 8088,8085,8086 microprocessor: a. 2.5 Million instruction per second b. 1.5 Million instruction per second c. 3.5 Million instruction per second d. 1.6 Million instruction per second

Last Answer : a. 2.5 Million instruction per second

Description : Which is most commonly measured in terms of MIPS previously million instruction per second: a. Microprocessor b. Performance of a microprocessor c. Assembly line d. None of thes

Last Answer : b. Performance of a microprocessor

Description : RISC stands for: a. Reduced Instruction Set Computer b. Reduced Intergraded Set Computer c. Resource Instruction Set Computer d. Resource Instruction System Computer

Last Answer : a. Reduced Instruction Set Computer

Description : CISC stands for: a. Complex Instruction System Computer b. Complex Instruction Set Car c. Complex Instruction Set Computer d. None of these

Last Answer : c. Complex Instruction Set Computer

Description : When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is ... two data bytes stored in the top two locations of the stack are transferred to the stack pointer

Last Answer : c. two data bytes stored in the top two locations of the stack are transferred to the program counter

Description : In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack

Last Answer : b. after OP code in the instruction

Description : When a subroutine is called, the address of the instruction following the CALL instructions stored in/on the a. stack pointer b. accumulator c. program counter d. stack

Last Answer : d. stack

Description : Pipeline implement a. fetch instruction b. decode instruction c. fetch operand d. calculate operand e. execute instruction f. all of abve

Last Answer : f. all of abve