1. It is a concurrent language that is it can execute statements at same time in parallel as in hardware.
2. It is a sequential language that is it can execute sequential statements one at a time in sequence.
3. It supports synchronous and asynchronous timing models.
4. Facilitates device independent of design portability.
5. It supports design libraries. 6. It has well defined interface.
7. Behaviour specification for simulation purpose.
8. Test Benches can also be generated.
9. Digital modelling techniques supported.
10. It is not technology specific.
11. VHDL has powerful construct language, constructs such as else if, with select, case, when etc.
12. VHDL supports flexible design methodologies top-down, bottom-up or mixed.
13. Strongly typed language:
14. Dealing with signed and unsigned numbers is natural, and there’s less chance of making a precision mistake or assigning a 16-bit signal to a 4-bit signal.
15. Ability to define custom types:
16. Record types: Define multiple signals into one type.
17. Natural coding style for asynchronous resets.