Working of Channel JFET:
Working: 1. The application of negative gate voltage and positive drain voltage with respect to source, reverse biases the gate- source junction of an N-channel JFET. 2. When a voltage is applied between the drain & source with dc supply voltage (VDD ), the electrons flows from source to drain through the narrow channel existing between the depletion regions. This constitutes the drain current (ID ) & its conventional direction is from drain to source. The value of drain current is maximum, when no external voltage is applied between the gate & source & is designated by the symbol IDSS. 3. When VGG is increased, the reverse bias voltage across gate-source junction is increased. As a result of this depletion regions are widened. This reduces the effective width of the channel & therefore controls the flow of drain current through the channel. 4. When gate to source voltage (VGS ) is increased further, a stage is reached at which both depletion regions touch each other. 5. At this value of VGS, channel is completely blocked or pinched off & drain current is reduced to zero. The value of VGS at which drain current becomes zero is called pinch off voltage designated by the symbol VP or VGS(OFF) . The value of VP is negative for N-channel JFET.