Description : Modern assemblers for RISC based architectures make optimization of instruction scheduling to make use of CPU __ efficiently: a. Pipeline b. Without pipeline c. Botha &b d. None of these
Last Answer : a. Pipeline
Description : Return instruction is written in_ to written to main program: a. Subroutine b. Main program c. Botha &b d. None of these
Last Answer : a. Subroutine
Description : Each instruction is executed by set of micro operations termed as. a. Micro instructions b. Mini instructions c. Botha &b d. None of these
Last Answer : a. Micro instructions
Description : The register which keeps track of the execution of a program and which contains the memory address of the instruction currently being executed is known as: a) Index Register b) Memory Address Register c) Program Counter d) None of The Above
Last Answer : c) Program Counter
Description : Which is the method by which instructions are selected for execution: a. Instruction selection b. — Selection control c. Instraction sequencing d. All of these
Last Answer : c. Instraction sequencing
Description : The simplest method of controlling sequence of instruction execution is to have each instruction explicitly specify: a. The address of next instruction to be run b. Address of previous instruction c. Both a &b d. None of these
Last Answer : a. The address of next instruction to be run
Description : The time required to complete one instruction is called. a. Fetch time b. Execution time c. Control time d. All of these
Last Answer : b. Execution time
Description : Execution of instruction specified by instruction to perform: a. Operation b. Operands c. Both a &b d. None of these
Last Answer : a. Operation
Description : Which unit is necessary for the execution of instruction: a. Timing b. Control ce. Both d. None of these
Last Answer : ce. Both
Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine
Last Answer : d. Executable, Stack and Subroutine
Description : Which of the following 2 task are performed to execute an instruction by MCU: a. Microinstruction execution b. Microinstruction sequencing c. Botha&b d. None of these
Last Answer : c. Botha&b
Description : Which microinstruction provide next instruction from control memory: a. Microinstruction execution b. Microinstruction Buffer c. Microinstruction decoder d. Microinstraction Sequencing
Last Answer : d. Microinstraction Sequencing
Description : Copy of instruction in cache memory is known as: a Execution cache b. Data cache c. Instruction cache d. Allof these
Last Answer : c. Instruction cache
Description : Which types of jump keeps a 2_byte instruction that holds the range from- 128to127 bytes in the memory location: a. Far jump b. Near jump ce. Short jump d. __ Allof these
Last Answer : ce. Short jump
Description : Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these
Last Answer : b. Cache memory
Description : function is used to transfer the control to end of a program which uses one argument( ) and takes value is zero for_ __ termination and non-zero for _termination: a. _ Exit( ) normal, abnormal b. Break, normal, abnormal Botha & b None of these
Last Answer : a. _ Exit( ) normal, abnormal
Description : getchar :: IO char in this given function what is indicated by IO char: a. when getchar is invoked it returns a character b. when getchar is executed it returns a character c. botha & b d. none of these
Last Answer : a. when getchar is invoked it returns a character
Description : A computer having writable control memory is known as_ a. Static micro programmable b. Dynamic micro programmable c. Botha & b d. None of these
Last Answer : b. Dynamic micro programmable
Description : Which state refers to a state that is not safe not necessarily a deadlocked state. a. Safe state b. Unsafe state c. Botha &b d. None of these
Last Answer : b. Unsafe state
Description : In protocol each process can make a request onlyinan a. Increasing order b. Decreasing order c. Botha &b d. None of these
Last Answer : a. Increasing order
Description : Which is one of the important I/O devices and is most commonly used as permanent storage device in any processor: a. Soft disk b. Hard disk c. Botha &b d. None of these
Last Answer : b. Hard disk
Description : which of the 2 files are created by the assembler. a. _ List and object file b. Link and object file c. Botha &b d. None of these
Last Answer : a. _ List and object file
Description : Ingiven lines of code MOV AX,BL have different type of operands according to assembler for 8086 architecture these identifiers must be of. a. Different type only in byte b. Same type either in word or byte c. Botha &b d. None of these
Last Answer : b. Same type either in word or byte
Description : IBM-360 type language is example which supporting _—___—sJanguage. a. Micro b. Macro c. Botha &b d. None of these
Last Answer : b. Macro
Description : address is not assigned by linker. a. Absolute b. Relative c. Botha &b a None of these
Last Answer : a. Absolute
Description : shave addresses where instructions are stored along with address of working storage: a. _ Relative entities b. Absolute entities c. Botha &b d. None of these
Last Answer : a. _ Relative entities
Description : Full form of MIPS assembler is: a. Microprocessor without interlocked pipeline stage b. Microprocessor with interlocked pipeline stage c. Botha &b d. None of these
Last Answer : a. Microprocessor without interlocked pipeline stage
Description : Ina complex program, the overlaps: a. Branching b. Condition c. Botha &b d. None of these
Last Answer : a. Branching
Description : Avoid crossing flow lines. a. Flowchart b. Algorithm c. Botha &b d. None of these
Last Answer : a. Flowchart
Description : is useful to prepare detailed program documentation: a. Flowchart b. Algorithm c. Botha &b d. None of these
Description : Cache memory is located between main memory and : a. CPU b. Memory c. Botha &b d. None of these
Last Answer : a. CPU
Description : subroutine declaration come after procedure announcement: a. Global b. Local c. Botha &b d. None of these
Last Answer : a. Global
Description : Callis_ subroutine call. a. Conditional b. Unconditi c. Botha &b d. None of these
Last Answer : b. Unconditi
Description : The processed data is sent for output to standard __ device which by default is computer screen: a. Input b. Output c. Botha &b d. None of these
Last Answer : b. Output
Description : which of the following is interrupt mode. a. Task mode b. Executive mode c. Botha &b d. None of these
Last Answer : b. Executive mode
Description : One last bit of control output is for control of___ state. a. Minor b. Major c. Mixer d. None of these
Last Answer : b. Major
Description : Which is the main function of the computer. a. Execute of programs b. Execution of programs c. Both d. None of these
Last Answer : b. Execution of programs
Description : Assembler works to convert assembly language program into machine language : a. Before the computer can execute it b. After the computer can execute it c. In between execution d. All of these
Last Answer : a. Before the computer can execute it
Description : During program execution content of main memory undergo changes and, but control memory has _ microprogram: a. Static b. Dynamic c. Compile time d. Fixed
Last Answer : d. Fixed
Description : Copy of data in cache memory is called. a. Datacache b. Execution cache c. Address cache d. Control cache
Last Answer : a. Datacache
Description : Ininstruction formats the information required by the _ for execution: a. ALU b. CPU Cc. RISC d. DATA
Last Answer : b. CPU
Description : Which section is basically a sequence of instruction with a clear indication of beginning and end for updating shared variables. a. Racing section b. Critical section c. d. Both None of thes
Last Answer : . Critical sectio
Description : Two important fields of an instruction are. a. Opcode b. Operand c. Only a d. Botha&b
Last Answer : d. Botha&b
Description : The complete set of op-codes for a particular microprocessor defines the_ set for that processor: a. Code b. Function c. Module d. Instruction
Last Answer : d. Instruction
Description : As the instruction length increases ————_ of instruction addresses in all the instruction is_ a. Implicit inclusion b. Implicit and disadvantageous c. Explicit and disadvantageous d. Explicit and disadvantageous
Last Answer : c. Explicit and disadvantageous
Description : __is the sequence of operations performed by CPU in processing an instruction: a. Execute cycle b. Fetch cycle c. Decode d. Instruction cycle
Last Answer : d. Instruction cycle
Description : _is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these
Last Answer : b. Fetch
Description : is the step during which the operations specified by the instruction are executed: a. Execute b. Decode c. Both a& b d. None of these
Last Answer : a. Execute
Description : Decode is the step during which instruction is__ a. Initialized b. Incremented c. Decoded d. Bothb&c
Last Answer : c. Decoded
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read