Description : Which 3 areas are used by cache process: a. Search, updating, invalidation b. Write, updating, invalidation c. Search, read, updating d. —_Invalidation, updating, requesting
Last Answer : a. Search, updating, invalidation
Description : Invalidation writes only to___ and erases previously residing address in memory: a. Folders b. Memory c. Directory d. Files
Last Answer : c. Directory
Description : When cache process starts hit and miss rate defines in cache directory: a. during search reads b. during search writes c. during replace writes d. during finding writes
Last Answer : a. during search reads
Description : In ............. method, the word is written to the block in both the cache and main memory, in parallel. (A) Write through (B) Write back (C) Write protected (D) Direct mapping
Last Answer : (A) Write through
Description : Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these
Last Answer : b. Cache memory
Description : Which unit acts as the brain of the computer which control other peripherals and interfaces: a. Memory unit b. Cache unit c. Timing and control unit d. None of these
Last Answer : c. Timing and control unit
Description : Cache memory is located between main memory and : a. CPU b. Memory c. Botha &b d. None of these
Last Answer : a. CPU
Description : Which memory is used to copy instructions or data currently used by CPU: a. Main memory b. Secondary memory c. Cache memory d. None of these
Last Answer : c. Cache memory
Description : Copy of instruction in cache memory is known as: a Execution cache b. Data cache c. Instruction cache d. Allof these
Last Answer : c. Instruction cache
Description : Copy of data in cache memory is called. a. Datacache b. Execution cache c. Address cache d. Control cache
Last Answer : a. Datacache
Description : What are 2 advantages of cache memory: a. Reduction of average access time for CPU memory b. Reduction of bandwidth of available memory of CPU c. Botha&b d. None of these
Last Answer : c. Botha&b
Description : In cache memory hit rate indicates. a. Data from requested address is not available b. Data from requested address is available c. Control from requested address is available d. Address from requested address is not available
Last Answer : b. Data from requested address is available
Description : In cache memory miss rate indicates. a. Availability of requested data b. Availability of requested address c. Non-Availability of requested data d. Non-Availability of requested address
Last Answer : c. Non-Availability of requested data
Description : Updating writes to cache data andalsoto___ a. Directories b. Memory c. Registers d. Folders
Last Answer : a. Directories
Description : function select takes op code in IR translating to function of ALU and it may be compact binary code or one line per ALU: a ALU b CPU c. Memory d. Cache
Last Answer : a ALU
Description : Which are the application of vector processing: a Weather forecasting b. Artificial intelligence Experts system a 2 Images processing Seismology Gene mapping Aerodynamics All of these i None of
Last Answer : All of these
Description : The simplest method of controlling sequence of instruction execution is to have each instruction explicitly specify: a. The address of next instruction to be run b. Address of previous instruction c. Both a &b d. None of these
Last Answer : a. The address of next instruction to be run
Description : Which are the basic operation for converting: a. Inputting b. Storing c. Processing d. Outputting e. Controlling f. All of these
Last Answer : f. All of these
Description : Cache Mapping Technique
Last Answer : Cache Mapping Technique:-
Description : Project management is the second major component of the planning phase of the systems development life cycle (SDLC), and it includes three steps: creating the work plan, staffing the project, and controlling and directing the project.
Last Answer : Ans: True
Description : The three steps of project management are _____. a. controlling the project, directing the project, and creating the work plan b. creating the work plan, staffing the project, and controlling ... the deliverables e. setting the start date, estimating the time, and reading the actual time
Last Answer : b. creating the work plan, staffing the project, and controlling and directing the project
Description : One of the primary roles of an audit program is to a. Provide for a standardized approach to the audit engagement. b. Serve as a tool for planning, directing, and controlling audit work. c ... an auditor's understanding of the internal control. d. Delineate the audit risk accepted by the auditor
Last Answer : Serve as a tool for planning, directing, and controlling audit work
Description : Management accounting provides invaluable services to management in performing: A. All management functions B. Coordination functions C. Controlling functions D. Directing function
Last Answer : A. All management functions
Description : Which operations are to be performed on a directory are: a. Search for a file b. Create a file c. Delete a file d. List a directory e. Rename a file f. Traverse the file system g. Allof these
Last Answer : g. Allof these
Description : SDRAM stands for. a. System dynamic random access memory b. Synchronous dynamic random access memory c. Both d. None
Last Answer : b. Synchronous dynamic random access memory
Description : Which types of register holds a single vector containing at least two read ports and one write ports: a. Data system b. Data base Cc. Memory d. Vector register
Last Answer : d. Vector register
Description : Parallel computing means doing several takes simultaneously thus improving the performance of the a. Data system b. Computer system Cc. Memory d. Vector register
Last Answer : b. Computer system
Description : The method which offers higher speeds of I/O transfers is ___________ a) Interrupts b) Memory mapping c) Program-controlled I/O d) DMA
Last Answer : DMA
Description : emaphore provides mutual exclusion for accesses to the buffer pool and is initialized to the value: a. Mutex b. Mutual Cc. Memory d. __ Allof these
Last Answer : Mutex
Description : specify where to get the source and destination operands for the operation specified by the a. Operand fields and opcode b. Opcode and operand c. Source and destination d. Cpu and memory
Last Answer : a. Operand fields and opcode
Description : The source/destination of operands can be the_ or one of the general-purpose register: a. Memory b. One c. both d. None of these
Last Answer : a. Memory
Description : _is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these
Last Answer : b. Fetch
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next
Last Answer : c. Instruction register, incremented and next
Description : Which unit works as an interface between the processor and all the memories on chip or off- chip: a. Timing unit b. Control unit c. Memory control unit d All of these
Last Answer : c. Memory control unit
Description : sis given an instruction in machine language this instruction is fetched from the memory by the CPU to execute: a. ALU b. CPU c. MU d. All of these
Last Answer : b. CPU
Description : Which instruction are 32 bits long , with extra 16 bits. a. Memory reference instruction b. Memory reference format c. Both d. None of these
Last Answer : a. Memory reference instruction
Description : Which is addressed by sign extending the 16-bit displacement to 32-bit: a. Memory address b. Effective memory address c. Both a and b d. None of these
Last Answer : b. Effective memory address
Description : Which are instruction in which two machine cycle are required: a. Instruction cycle b. Memory reference instruction c. Both d. None of these
Last Answer : b. Memory reference instruction
Description : Which instruction are used in multithreaded parallel processor architecture. a. Memory reference instruction b. Memory reference format c. Both d. None of these
Description : Which instruction are arranged as per the protocols of memory reference format of the input file in a simple ASCII sequence of integers between the range O to 99 separated by spaces without formatted text ... : a. Memory reference instruction b. Memory reference format c. Both d. None of these
Description : Which are benefit of input/output interrupt: a. It is an external analogy to exceptions b. The processor initiates and perform all I/O operation c. The data is transferred into the memory through interrupt handler d. = Alllof these
Last Answer : d. = Alllof these
Description : of the primary memory of the computer is limited. a. Storage capacity b. Magnetic disk c. Both d. None of these
Last Answer : a. Storage capacity
Description : Which microprocessor has the control unit, memory unit and arithmetic and logic unit: a. Pentium IV processor b Pentium V processor c. Pentium III processor d. None of these
Last Answer : a. Pentium IV processor
Description : Which operations are used for addition, subtraction, increment, decrement and complement function: a. Bus b. Memory transfer c. Arithmetic operation d. Allof these
Last Answer : d. Allof these
Description : In which transfer the computer register are indicated in capital letters for depicting its function. a. Memory transfer b. Register transfer c. Bus transfer d. None of these
Last Answer : b. Register transfer
Description : The register that includes the address of the memory unit is termed asthe _ a. MAR b PC Cc. IR d. None of these
Last Answer : a. MAR
Description : In memory transfer location address is supplied by that puts this on address bus. a. ALU b. CPU Cc. MAR d. MDR
Description : In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these
Last Answer : ce. MAR
Description : Which operation puts memory address in memory address register and data in DR. a Memory read b. Memory write c Both d. None
Last Answer : b. Memory write