List & explain the timer instruction of PLC. Draw the ladder diagram to verify (i) OR gate& (ii) NOR gate logic 

1 Answer

Answer :

Depending on the time delay and operation, there are two types of timers 

* PLC timer- (i) ON delay timer

 (ii) OFF delay timer

Description (i) ON delay timer

1) This instruction counts time interval when conditions preceding it in the rung are true. Produces an output when accumulated reaches the preset value.

2) Use Ton instruction to turn an output on or off after the timer has been on for a preset time interval. The Ton instruction begins to count time base intervals when the rung conditions become true.

3) The accumulated value is reset when the rung condition go false regardless of whether the timer has timed out.

Instruction parameter- Timer TON is 3 word elements.

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Status bit explanationi) Timer done bit (bit13)-DN is set when the accumulated value is equal to or greater than the preset value. It is reset when rung condition become false. ii) Timer enable bit (bit 14)-EN is set when rung condition are true. It is reset when rung condition become false. iii) Timer timing bit (bit15)-TT is set when rung conditions are true & the accumulated value is less than the preset value. It is reset when the rung conditions go false or when the done bit is set. 


Description (ii) OFF delay timer 

1)This instruction counts time interval when conditions preceding it in the rung are produces low output when accumulated value reaches the preset value. 2) Use Toff instruction to turn an output on or off after the timer has been off for a preset timer has been off for a preset time intervals. The Toff instruction begins to count time base intervals when the rung makes a true to false to transition. 3) As long as rung conditions remains false the timer increments its accumulated value each scan until it reaches the preset value.The accumulated value is reset when the rung conditions go true regardless of whether the timer has timed out. 

Instruction parameter- Timer TOFF is 3 word elements. 

image

Status bit explanation-1 i) Timer done bit(bit13)-DN is reset when the accumulated value is equal to or greater than the preset value. It is set when rung condition are true. ii) Timer enable bit(bit 14)-EN is set when rung condition are true. It is reset when rung condition become false. iii) Timer timing bit(bit15)-TT is set when rung conditions are false & the accumulated value is less than the preset value. It is reset when the rung conditions go true or when the done bit is reset.


a) OR gate ladder diagram

y = A + B

image

b)NOR gate ladder diagram

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