In a logic circuit the NOR and NAND gate functions ____________. A. must be accomplished with a common base transistor arrangement B. are available in diode form C. are exact opposites with the same NOR and NAND inputs D. have output conditions that are exact opposites to the output condition for OR and AND, respectively

In a logic circuit the NOR and NAND gate functions ____________. A. must be accomplished with a common base transistor arrangement B. are available in diode form C. are exact opposites with the same NOR and NAND inputs D. have output conditions that are exact opposites to the output condition for OR and AND, respectively
by

1 Answer

Answer :

Answer: D
by

Related questions

In a logic circuit, the NOT gate function _____________. A. does not alter a logical input B. serves to amplify a given signal level C. must be accomplished with a common collector transistor arrangement D. reverses an input logic condition

Description : In a logic circuit, the NOT gate function _____________. A. does not alter a logical input B. serves to amplify a given signal level C. must be accomplished with a common collector transistor arrangement D. reverses an input logic condition

Last Answer : Answer: D

The output of a logic gate is 1 when all its inputs are at logic 0. the gate is either (A) a NAND or an EX-OR (B) an OR or an EX-NOR (C) an AND or an EX-OR (D) a NOR or an EX-NOR

Description : The output of a logic gate is 1 when all its inputs are at logic 0. the gate is either (A) a NAND or an EX-OR (B) an OR or an EX-NOR (C) an AND or an EX-OR (D) a NOR or an EX-NOR

Last Answer : (D) a NOR or an EX-NOR

A NAND gate has inputs labeled as A, B, and C. If A and B are HIGH, C must be at what logic level to produce a HIGH output?

Description : A NAND gate has inputs labeled as A, B, and C. If A and B are HIGH, C must be at what logic level to produce a HIGH output?

Last Answer : . Low.

A NAND gate has Z and X as inputs. What will be the output logic level if Z is HIGH and X is LOW? A NAND gate has Z and X as inputs. What will be the output logic level if Z is HIGH and X is LOW?

Description : A NAND gate has Z and X as inputs. What will be the output logic level if Z is HIGH and X is LOW?

Last Answer : HIGH.

In what state must the inputs to a NOR gate be in order to produce a logic 1 output?

Description : In what state must the inputs to a NOR gate be in order to produce a logic 1 output?

Last Answer : All inputs must be low.

What must be the state of the inputs to a NAND gate in order to produce a LOW output?

Description : What must be the state of the inputs to a NAND gate in order to produce a LOW output?

Last Answer : All inputs must be HIGH.

Which of the listed logic gates is considered to be a BASIC building block (basic logic gate) used in logic diagrams? A. NAND B. OR C. NOR D. All of the above.

Description : Which of the listed logic gates is considered to be a BASIC building block (basic logic gate) used in logic diagrams? A. NAND B. OR C. NOR D. All of the above.

Last Answer : Answer: B

What is the equivalent logic gate of a two-input NAND gate with both inputs inverted?

Description : What is the equivalent logic gate of a two-input NAND gate with both inputs inverted?

Last Answer : OR gate.

What is the output Boolean expression for a NAND gate with inputs A, B, and C?

Description : What is the output Boolean expression for a NAND gate with inputs A, B, and C?

Last Answer : C B A

The NAND gate output will be low if the two inputs are (A) 00 (B) 01 (C) 10 (D) 11

Description : The NAND gate output will be low if the two inputs are (A) 00 (B) 01 (C) 10 (D) 11

Last Answer : (D) 11

For a NAND gate, when one or more inputs are low then the output will be

Description :  For a NAND gate, when one or more inputs are low then the output will be A) Low B) High C) Alternately high and low D) High or low depending on relative magnitude of inputs 

Last Answer :  For a NAND gate, when one or more inputs are low then the output will be High 

Output of NAND gate is 0. for three inputs when:

Description : Output of NAND gate is 0. for three inputs when:

Last Answer : Output of NAND gate is 0. for three inputs when: all the inputs are 1

The output of a 2-input NAND gate with high at both the inputs will be

Description : The output of a 2-input NAND gate with high at both the inputs will be • High • Low • High & low • None of the above.

Last Answer : The output of a 2-input NAND gate with high at both the inputs will be Low

What type of logic circuit is indicated by the truth table shown in the illustration? EL-0072 A. OR B. AND C. NOR D. NAND

Description : What type of logic circuit is indicated by the truth table shown in the illustration? EL-0072 A. OR B. AND C. NOR D. NAND

Last Answer : Answer: A

A triac thyristor functions as a control device and is basically ________________. A. two NPN transistors in parallel with a common base lead B. a diode in series with a temperature sensitive capacitor C. two back-to-back SCR's with a common gate lead D. a triode tube with an extra heavy grid element

Description : A triac thyristor functions as a control device and is basically ________________. A. two NPN transistors in parallel with a common base lead B. a diode in series with a temperature sensitive capacitor C. two ... -back SCR's with a common gate lead D. a triode tube with an extra heavy grid element

Last Answer : Answer: C

A Gate is a logic circuit with one or more inputs, but only - - - output

Last Answer :  A Gate is a logic circuit with one or more inputs, but only One output

In a NOR gate all inputs must be - - - to get high output

Last Answer :  In a NOR gate all inputs must be Low to get high output

One method of troubleshooting digital circuits in a console is to ___________. A. supply alternate logic levels at the input(s) and test for change of state conditions at the output B. ground all inputs and test for a logic '1' at the output C. open all inputs and test for a logic '0' at the output D. vary each input smoothly from 0-10 volts and test for similar variance at the output

Description : One method of troubleshooting digital circuits in a console is to ___________. A. supply alternate logic levels at the input(s) and test for change of state conditions at the output B. ground all ... output D. vary each input smoothly from 0-10 volts and test for similar variance at the output

Last Answer : Answer: A

A two-input X-OR gate will produce a HIGH output when the inputs are at what logic levels?

Description : A two-input X-OR gate will produce a HIGH output when the inputs are at what logic levels?

Last Answer : . One or the other of the inputs must be HIGH, but not both at the same time.

The output of logic gate is '1' when all its inputs are at logic '0' The gate is

Description : The output of logic gate is '1' when all its inputs are at logic '0' The gate is (A) NAND/EX-OR (B) NOR/EX-OR (C) AND/EX-NOR (D) NOR/EX-NOR

Last Answer : The answer is (D) If we take two input A and B, and corresponding output Y then for nor gate Y = complement of (A+B)  ;for ex-nor gate Y= A.B + complement of(A.B) The above two relation showing always Y =1 for A=0,B=0.

Which of the following logic operations is performed by the following given combinational circuit ? Image (A) EXCLUSIVE-OR (B) EXCLUSIVE-NOR (C) NAND (D) NOR

Description : Which of the following logic operations is performed by the following given combinational circuit ?  (A) EXCLUSIVE-OR (B) EXCLUSIVE-NOR (C) NAND (D) NOR

Last Answer : (A) EXCLUSIVE-OR

. What will be the output of an X-NOR gate when both inputs are LOW?

Description : . What will be the output of an X-NOR gate when both inputs are LOW?

Last Answer : HIGH.

What is the output Boolean expression for a NOR gate with R and T as inputs?

Description : What is the output Boolean expression for a NOR gate with R and T as inputs?

Last Answer : (R +T)’

What will be the output of a NOR gate when both inputs are HIGH?

Description : What will be the output of a NOR gate when both inputs are HIGH?

Last Answer : Low.

The NOR gate output will be low if the two inputs are (A) 00 (B) 01 (C) 10 (D) 11

Description : The NOR gate output will be low if the two inputs are (A) 00 (B) 01 (C) 10 (D) 11

Last Answer : A

One diode of a full-wave rectifier has burned out in a shorted condition. Therefore, the output will be ____________. A. zero B. a rectified half-wave C. a rectified full-wave D. equal to the AC input

Description : One diode of a full-wave rectifier has burned out in a shorted condition. Therefore, the output will be ____________. A. zero B. a rectified half-wave C. a rectified full-wave D. equal to the AC input

Last Answer : Answer: D

A universal logic gate is one, which can be used to generate any logic function. Which of the following is a universal logic gate? (A) OR (B) AND (C) XOR (D) NAND

Description : A universal logic gate is one, which can be used to generate any logic function. Which of the following is a universal logic gate? (A) OR (B) AND (C) XOR (D) NAND

Last Answer : Ans: D NAND can generate any logic function.

A NAND gate is called a universal logic element because

Last Answer : A NAND gate is called a universal logic element because any logic function can be realized by NAND gates alone.

DeMorgan’s first theorem shows the equivalence of (A) OR gate and Exclusive OR gate. (B) NOR gate and Bubbled AND gate. (C) NOR gate and NAND gate. (D) NAND gate and NOT gate

Description : DeMorgan’s first theorem shows the equivalence of (A) OR gate and Exclusive OR gate. (B) NOR gate and Bubbled AND gate. (C) NOR gate and NAND gate. (D) NAND gate and NOT gate

Last Answer : (B) NOR gate and Bubbled AND gate.

The gates required to build a half adder are (A) EX-OR gate and NOR gate (B) EX-OR gate and OR gate (C) EX-OR gate and AND gate (D) Four NAND gates.

Description : The gates required to build a half adder are (A) EX-OR gate and NOR gate (B) EX-OR gate and OR gate (C) EX-OR gate and AND gate (D) Four NAND gates.

Last Answer : (C) EX-OR gate and AND gate

Why NAND and NOR gate are called as universal gate? Draw AND gate using NAND gate only.

Description : Why NAND and NOR gate are called as universal gate? Draw AND gate using NAND gate only. 

Last Answer : Universal gate - All basic gates functionality can be implemented using NAND and NOR gate hence these gates are called as universal gates.  AND gate using NAND gate

Sketch symbol of NAND gate and NOR gate.

Description : Sketch symbol of NAND gate and NOR gate.

Last Answer : Symbol of NAND gate and NOR gate

A gate in which all inputs must be low to get a high output is called

Last Answer : A gate in which all inputs must be low to get a high output is called A NOR gate.

If the inputs to the diagram shown in the illustration were J=1, K=0, H=0, L=1, M=1, what logic levels would be indicated at points 'X' and 'Y' respectively? EL-0089 A. 0,0 B. 0,1 C. 1,0 D. 1,1

Description : If the inputs to the diagram shown in the illustration were J=1, K=0, H=0, L=1, M=1, what logic levels would be indicated at points 'X' and 'Y' respectively? EL-0089 A. 0,0 B. 0,1 C. 1,0 D. 1,1

Last Answer : Answer: D

If the inputs to the diagram shown in the illustration were J=1, K=1, H=0, L=1, M=1, what logic levels would be indicated at points 'X' and 'Y' respectively? EL-0089 A. 0,0 B. 0,1 C. 1,0 D. 1,1

Description : If the inputs to the diagram shown in the illustration were J=1, K=1, H=0, L=1, M=1, what logic levels would be indicated at points 'X' and 'Y' respectively? EL-0089 A. 0,0 B. 0,1 C. 1,0 D. 1,1

Last Answer : Answer: D

If the inputs to the diagram shown in the illustration were J=0, K=0, H=1, L=0, M=1, what logic levels would be indicated at points 'X' and 'Y' respectively? EL-0089 A. 0,0 B. 0,1 C. 1,0 D. 1,1

Description : If the inputs to the diagram shown in the illustration were J=0, K=0, H=1, L=0, M=1, what logic levels would be indicated at points 'X' and 'Y' respectively? EL-0089 A. 0,0 B. 0,1 C. 1,0 D. 1,1

Last Answer : Answer: C

If the inputs to the diagram shown in the illustration were J=1, K=0, H=1, L=1, M=0, what logic levels would be indicated at points 'X' and 'Y' respectively? EL-0089 A. 0,0 B. 0,1 C. 1,0 D. 1,1

Description : If the inputs to the diagram shown in the illustration were J=1, K=0, H=1, L=1, M=0, what logic levels would be indicated at points 'X' and 'Y' respectively? EL-0089 A. 0,0 B. 0,1 C. 1,0 D. 1,1

Last Answer : Answer: A

The standard method of controlling the output voltage of a 440 volt, 60 Hz, AC generator is accomplished by adjusting the ____________. A. prime mover speed droop B. number of poles C. alternator field excitation D. load on the alternator

Description : The standard method of controlling the output voltage of a 440 volt, 60 Hz, AC generator is accomplished by adjusting the ____________. A. prime mover speed droop B. number of poles C. alternator field excitation D. load on the alternator

Last Answer : Answer: C

A full adder logic circuit will have (A) Two inputs and one output. (B) Three inputs and three outputs. (C) Two inputs and two outputs. (D) Three inputs and two outputs.

Description : A full adder logic circuit will have (A) Two inputs and one output. (B) Three inputs and three outputs. (C) Two inputs and two outputs. (D) Three inputs and two outputs.

Last Answer : Ans: D A full adder circuit will add two bits and it will also accounts the carry input generated in the previous stage. Thus three inputs and two outputs (Sum and Carry) are there.

For console circuit card 'LLEA' as shown in the illustration at coordinates '63R/S', the input(s) and output(s) are respectively on pin numbers ____________. EL-0100 A. '5' and '3' & '4' B. '2' & '3' and '5' & '6' C. '5' & '6' and '2' & '3' D. '3' & '4' and '5'

Description : For console circuit card 'LLEA' as shown in the illustration at coordinates '63R/S', the input(s) and output(s) are respectively on pin numbers ____________. EL-0100 A. '5' and '3' & '4' B. '2' & '3' and '5' & '6' C. '5' & '6' and '2' & '3' D. '3' & '4' and '5'

Last Answer : Answer: D

One feature of the operational amplifier is that it can have ____________. A. up to ten outputs B. binary coded decimal inputs C. several hundred amps at the output D. inverting and non-inverting inputs

Description : One feature of the operational amplifier is that it can have ____________. A. up to ten outputs B. binary coded decimal inputs C. several hundred amps at the output D. inverting and non-inverting inputs

Last Answer : Answer: D

A NOT gate can be implemented by: (1) a single diode (2) two diodes (3) a single resistor (4) a single transistor

Description : A NOT gate can be implemented by: (1) a single diode (2) two diodes (3) a single resistor (4) a single transistor

Last Answer : (4) a single transistor Explanation: In digital logic, an inverter or NOT gate is a logic gate which implements logical negation. An inverter circuit outputs a voltage representing the opposite ... be constructed using a single NMOS transistor or a single PMOS transistor coupled with a resistor.

A NOT gate can be implemented by: (1) a single diode (2) two diodes (3) a single resistor (4) a single transistor

Description : A NOT gate can be implemented by: (1) a single diode (2) two diodes (3) a single resistor (4) a single transistor

Last Answer : a single transistor

The device in figure 'B' shown in the illustration will conduct when the ____________. EL-0067 A. base-emitter is forward biased and the collector-base is reverse biased B. anode-cathode is forward biased and the cathode-gate is forward biased C. source-gate is forward biased and the gate-drain is reversed biased D. terminal 1-2 is forward biased and the emitter-terminal 1 is reverse biased

Description : The device in figure 'B' shown in the illustration will conduct when the ____________. EL-0067 A. base-emitter is forward biased and the collector-base is reverse biased B. anode-cathode is forward ... is reversed biased D. terminal 1-2 is forward biased and the emitter-terminal 1 is reverse biased

Last Answer : Answer: B

Leads on the device in figure 'B' shown in the illustration are named ____________. EL-0067 A. source, gate and drain B. emitter, base and collector C. emitter, base 1 and base 2 D. anode, cathode and gate

Description : Leads on the device in figure 'B' shown in the illustration are named ____________. EL-0067 A. source, gate and drain B. emitter, base and collector C. emitter, base 1 and base 2 D. anode, cathode and gate

Last Answer : Answer: D

In a certain electronic circuit the output is positive if input 1 is positive and input 2 is zero. If both inputs are positive the output is zero. This is: w) an AND circuit x) a NOR circuit y) an OR circuit z) a high-pass filter

Description : In a certain electronic circuit the output is positive if input 1 is positive and input 2 is zero. If both inputs are positive the output is zero. This is: w) an AND circuit x) a NOR circuit y) an OR circuit z) a high-pass filter

Last Answer : ANSWER: Y -- AN OR CIRCUIT

When replacing component 'B' of the circuit shown in the illustration, it is important to know that ____________. EL-0081 A. it is polarity sensitive and must be inserted as indicated on its base B. there is a danger of phosphor poisoning should 'B''s bulb break C. component 'D' must be closed during the replacement to provide the capacitor's initial charge D. it must match the circuit voltage and component 'C' wattage

Description : When replacing component 'B' of the circuit shown in the illustration, it is important to know that ____________. EL-0081 A. it is polarity sensitive and must be inserted as indicated on its ... provide the capacitor's initial charge D. it must match the circuit voltage and component 'C' wattage

Last Answer : Answer: D

When changing out component 'B' of the circuit shown in the illustration, it is important to know that ____________. EL-0081 A. it is polarity sensitive and must be inserted as indicated on its base B. there is a danger of phosphor poisoning should 'B''s bulb break C. component 'D' must be closed during the replacement to provide the capacitor's initial charge D. it must match the circuit voltage and component 'C' wattage

Description : When changing out component 'B' of the circuit shown in the illustration, it is important to know that ____________. EL-0081 A. it is polarity sensitive and must be inserted as indicated on its ... provide the capacitor's initial charge D. it must match the circuit voltage and component 'C' wattage

Last Answer : Answer: D

In the illustrated circuit, one advantage of the capacitor coupling over direct coupling is ____________. EL-0048 A. as the frequency decreased the capacitive reactance (Xc) increases B. the amplifier becomes more efficient at lower capacitance. C. the arrangement allows the coupling of the signal while it isolates the biasing of each stage. D. good frequency response.

Description : In the illustrated circuit, one advantage of the capacitor coupling over direct coupling is ____________. EL-0048 A. as the frequency decreased the capacitive reactance (Xc) increases B. the amplifier becomes ... of the signal while it isolates the biasing of each stage. D. good frequency response.

Last Answer : Answer: C

Component 'C' in section 'I' shown in the illustration represent ____________. EL-0093 A. a selectable holding coil arrangement B. a 'fuse blown' indicator circuit C. 'reset' and 'trouble' lamps D. a handset with switch and voice elements

Description : Component 'C' in section 'I' shown in the illustration represent ____________. EL-0093 A. a selectable holding coil arrangement B. a 'fuse blown' indicator circuit C. 'reset' and 'trouble' lamps D. a handset with switch and voice elements

Last Answer : Answer: D