There are two main types of task scheduling algorithm in Real-Time Operating Systems (RTOS).
1. Rate Monotonic Scheduling (RMS)
2. Earliest-Deadline-First (EDF)
Rate Monotonic Scheduling (RMS) :
Last Answer : The scheduler is very important in Real-Time Operating System (RTOS). Selection of tasks for execution is provided by the scheduler. Which task to execute when it is provided by the ... . Non-preemptive scheduling is simple.Preemptive scheduling is flexible while non-preemptive scheduling is rigid.
Description : What is the real time scheduling?
Last Answer : Hard real-time and soft real-time are the types of real time scheduling. Real time
Description : What is monotonic DAC?
Last Answer : A monotonic DAC is one whose analog output increases for an increase in digital input.
Description : Default reasoning is another type of ⮚ Analogical reasoning ⮚ Bitonic reasoning ⮚ Non-monotonic reasoning ⮚ Monotonic reas
Last Answer : ⮚ Non-monotonic reasoning
Description : Compare the annual growth rate of 1.IC capacity 2.Designer productivity.
Last Answer : Compare the annual growth rate of 1.IC capacity2.Designer productivity.
Description : Normally, the FPGA resources are used less than 70% because: a. Routing becomes excessively complicated b. Power issues c. Clock frequency d. Simulation time increases
Last Answer : Normally, the FPGA resources are used less than 70% because: Routing becomes excessively complicated
Description : List and describe three general approaches to improve designer productivity.
Last Answer : Automation: The task of using a computer program to replace manual design effort. The program replaces manual design effort. Synthesis. Reuse: The ... correctness/completeness of each design step. Hardware/software co-simulation.
Description : Explain placement, routing, and sizing.
Last Answer : Placement: The task of placing and orienting every transistor somewhere on IC. Routing: The task of running wires between the transistors without inserting other wires or transistors. ... wires and transistor provide better performance but consume more power and require more silicon area.
Description : A single FSM can be converted to two smaller FSM. Justify.
Last Answer : Common computation models: Sequential program model Statements, rules for composing statements, semantics for executing them Communicating process model ... Object-oriented model For breaking complex software into simpler, well-defined pieces
Description : Sketch internal design of 4x3 ROM.
Last Answer : The internal design of 4x3 ROM
Description : Explain the advantages and disadvantages of using memory I/O and standard I/O.
Last Answer : Memory mapped I/O and standard I/O are the two methods for communicating microprocessor with peripherals. Processor talks to both memory and peripheral using the same bus.Two ways to talk to a peripheral. ... of standard I/O is no loss of memory addresses to the use as I/O addresses.
Description : Explain parallel and wireless protocols.
Last Answer : Parallel protocols: PCI bus (Peripheral Components Interconnect): PCI stands for Peripheral Components Interconnect. PCI bus is used as a communication line to transmit signals and data ... provide the basis for wireless network products using the Wi-Fi brand.
Description : Explain memory hierarchy.
Last Answer : Memory hierarchy: Main memory is large, inexpensive, slow memory stores entire program and data. Cache memory is small, expensive, fast memory stores copy of likely accessed parts of large ... In memory hierarchy the smaller memory is faster and larger memory storage is slower.
Description : Explain memory write ability and storage permanence with suitable diagram.
Last Answer : Write ability and storage permanence of memories: Write ability is the manner and speed at which memory can be written. Storage permanence is the ability of memory to hold stored bits ... Holds bits after power is no longer supplied. High end and middle range of storage permanence.
Description : Describe different RT level computational and sequential components used to design single function processors.
Last Answer : RT-level combinational components:- To reduce the complexity in digital logic, combinational components are used, which are more powerful than logic gates. Such combinational ... during a clock edge. An asynchronous inputs value effects the circuit independent of the clock.
Description : Build using minimum number of CMOS gates. Three input NAND gate. Two input NOR gate Three input NOR gate Two input AND gate Two input OR gate
Last Answer : Three input NAND gate. Two input NOR gate Three input NOR gate Two input AND gate Two input OR gate
Description : Explain the various steps involved in designing a custom single-purpose processor.
Last Answer : A single purpose processor is a digital circuit designed to execute exactly one program. It is also known as co-processor, accelerator or peripheral. It contains only ... for small quantities. Performance may not match general-purpose processors for same applications.
Description : If Moor's law continues to hold, predict the approximation number of transistor per leading edge IC in the year. 1.2030 2.2050
Last Answer : If Moor's law continues to hold, predict the approximation number of transistor per leading edge IC in the year.1.20302.2050
Description : Explain Inter-process Communication (IPC) using mailbox/queue.
Last Answer : Inter-process communication using mailbox: Mailbox is the Interprocess communication mechanism. A process puts a data message for another process in the mailbox. Mailbox is also called as message exchange. ... a message. In mailbox IPC the sender need not to know the name of the receiver.
Description : Explain arbitration. What is priority arbitrator?
Last Answer : Arbitration: IF multiple peripherals are connected to microprocessor or DMA controller or any resource and they request services simultaneously so which peripheral will get serviced first this is ... Peripherals make requests to arbiter and arbiter makes requests to the resource.
Description : Explain FSM and concurrent process with example.
Last Answer : Finite State Machine (FSM): Finite state machine is a machine which have a transition from state to state. The system have some number of states and at a time the system can ... Y seconds. In sequential execution, the processor executes single task which causes poor processor utilization.
Description : Compose 1k x 8 ROMS into 8k x 8 ROM.
Last Answer : 1k x 8 ROMS into 8k x 8 ROM:
Description : What is design technology? Explain top down design process.
Last Answer : Design technology: Design technology is the manner in which we convert our concept desired system into an implementation. The three main design technologies are 1. Compilation/Synthesis ... general purpose processors and A Gate-level Netlist for special-purpose processors.
Description : Explain data transfer mechanism in I2C protocol. Compare it with CAN and USB protocol based on bit rate and area of applications.
Last Answer : I2C (Inter-Integrated Circuit): I2C stands for Inter-Integrated Circuit. I2C is a serial protocol. It was developed by Philips Semiconductor. I2C bus have two communication lines. One is serial data ( ... Mbps this is used for lower speed devices. Using USB we can connect upto 127 devices.
Description : What is Mailbox? Write a note on Mailbox.
Last Answer : Mailbox is used for inter-process communication for sending small messages between tasks or between ISR and task. The Mailbox is used in some Real Time Operating system (RTOS). If the task or ... received by which task or thread is called mailbox client. Mailbox message is a kernel service.
Last Answer : The volatile keyword is a part of C standard, and this warns the compiler that ISR might change the value of a variable so that the compiler will not optimize the code in a way that will ... the keyword is not supported, you can still get the similar result by turning off the compiler optimizations.
Description : explain how a stepper motor is controlled using driver. give relevant hardware and software details.
Last Answer : A stepper motor is an electric motor that rotates fix number of degrees whenever we apply a step signal. the stepper motor can rotate 1.8-degree full step or ... driver 2. controlling a stepper motor directly Application of stepper motor: disk driversprintersphotocopyfax machinerobotscamcorder
Description : Explain Keypad controller.
Last Answer : Keypad Controller: It's a device which interfaces between the computer and keyboard. That is a input device and used for transfer the data to connected device.
Last Answer : Liquid Crystal Display:-An LCD is a low-cost, low power device capable of displaying text and images. LCD's are extremely common in embedded systems since such system often does not have video monitors ... toggles the enables bit and acts as a delay so that the command can be processed and executed.
Last Answer : UART takes parallel data and transmits serially and UART receives serial data and converts to parallel.A simple UART may possess1.Some configuration registers and2.Two independently operating processors, one ... must write data to the transmit register and/or read data from the received register.
Last Answer : Timers:-A timer is a peripheral device that can measure time intervals. Timers can be used to1. General events at the specific time or to determine the duration of two external events.eg. Keeping a ... the number of times the car wheel rotates in one second, in order to determine cars speed.
Last Answer : Most microprocessors have a nonmaskable interrupt, an input pin that causes an interrupt that cannot be disabled. If an interrupt routine shares any data with the task code, then it is necessary ... by setting the priority level. 3. It allows us to enable and disable individual interrupts.
Last Answer : Interrupt latency is the amount is the amount of time it takes a system to respond to an interrupt.The 4 factors influencing on embedded system response to an interrupt are:1. The longest period of time ... 2 is one of the reasons that it is generally a good idea to write short interrupt routines.
Last Answer : A semaphore is called binary semaphore when its value is 0, it is assumed that it has been taken (or accepted) & when its value is 1, it is assumed that it has been released & no ... that are not themselves reentrant.3. A reentrant function may does not use the hardware in a nonatomic way.
Description : What are counting semaphores and resource semaphore?
Last Answer : If a task tries to take the semaphore when the integer is equal to zero, then the task will block. These semaphores are called counting semaphore. Some system offer semaphore that can be ... , but they cannot be used to communicate between two tasks. Such semaphores are called resource semaphore.
Last Answer : Instruction execution has 5 basic stages:1. Fetch instruction:The task of reading the next instruction from memory into the instruction register.2. Decode instruction:The task of determining what operation ... into an appropriate register.5. Store results:The task of writing a register into memory.
Last Answer : A design metric is a measure of a implementations features such as cost, size, performance and power.Commonly used design metrics are:1.NRE cost:NRE stands for non recurring engineering cost. ... to check that manufacturing was correct.11.Safety:The probability that the system will not cause harm.