A CPU handles interrupt by executing interrupt service subroutine................. (A) by checking interrupt register after execution of each instruction (B) by checking interrupt register at the end of the fetch cycle (C) whenever an interrupt is registered (D) by checking interrupt register at regular time interval

A CPU handles interrupt by executing interrupt service subroutine................. (A) by checking interrupt register after execution of each instruction (B) by checking interrupt register at the end of the fetch cycle (C) whenever an interrupt is registered (D) by checking interrupt register at regular time interval
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Answer :

(A) by checking interrupt register after execution of each instruction
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The contents of Register (BL) and Register (AL) of 8085 microprocessor are 49H and 3AH respectively. The contents of AL, the status of carry flag (CF) and sign flag (SF) after executing 'SUB AL, BL' assembly language instruction, are (1) AL=0FH; CF=1; SF=1 (2) AL=F0H; CF=0; SF=0 (3) AL=F1H; CF=1; SF=1 (4) AL=1FH; CF=1; SF=1

Description : The contents of Register (BL) and Register (AL) of 8085 microprocessor are 49H and 3AH respectively. The contents of AL, the status of carry flag (CF) and sign flag (SF) after executing 'SUB AL, BL' assembly language instruction, are ( ... ; CF=0; SF=0 (3) AL=F1H; CF=1; SF=1 (4) AL=1FH; CF=1; SF=1

Last Answer : Answer: 3

A ______ Instruction at the end of interrupt service program takes the execution back to the

Description : A ______ Instruction at the end of interrupt service program takes the execution back to the interrupted program.   (a) Forward (b) Return (c) Data (d) Line 

Last Answer : A Return Instruction at the end of interrupt service program takes the execution back to the interrupted program.

A DMA controller transfers 32-bit words to memory using cycle Stealing. The words are assembled from a device that transmits characters at a rate of 4800 characters per second. The CPU is fetching and executing instructions at an average rate of one million instructions per second. By how much will the CPU be slowed down because of the DMA transfer? (A) 0.06% (B) 0.12% (C) 1.2% (D) 2.5%

Description : A DMA controller transfers 32-bit words to memory using cycle Stealing. The words are assembled from a device that transmits characters at a rate of 4800 characters per second. The CPU is fetching and executing instructions at an average ... of the DMA transfer? (A) 0.06% (B) 0.12% (C) 1.2% (D) 2.5%

Last Answer : Answer: B

Which cycle refers to the time period during which one instruction is fetched and executed by the CPU: a. Fetch cycle b. Instruction cycle c. Decode cycle d. Execute cycle

Description : Which cycle refers to the time period during which one instruction is fetched and executed by the CPU: a. Fetch cycle b. Instruction cycle c. Decode cycle d. Execute cycle

Last Answer : b. Instruction cycle

__is the sequence of operations performed by CPU in processing an instruction: a. Execute cycle b. Fetch cycle c. Decode d. Instruction cycle

Description : __is the sequence of operations performed by CPU in processing an instruction: a. Execute cycle b. Fetch cycle c. Decode d. Instruction cycle

Last Answer : d. Instruction cycle

In 8085, whenever a signal is received at TRAP terminal, its program execution is transferred to a subroutine

Description : In 8085, whenever a signal is received at TRAP terminal, its program execution is transferred to a subroutine on address A) 0000 H B) 002C H C) 0024 H D) 0004 H

Last Answer : In 8085, whenever a signal is received at TRAP terminal, its program execution is transferred to a subroutine on address 0024 H

When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non executable, pointer and subroutine b. Executable, Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine

Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine

Last Answer : d. Executable, Stack and Subroutine

The Register that stores all interrupt requests is: (A) Interrupt mask register (B) Interrupt service register (C) Interrupt request register (D) Status register

Description : The Register that stores all interrupt requests is: (A) Interrupt mask register (B) Interrupt service register (C) Interrupt request register (D) Status register

Last Answer : (C) Interrupt request register

The time required to complete one instruction is called. a. Fetch time b. Execution time c. Control time d. All of these

Description : The time required to complete one instruction is called. a. Fetch time b. Execution time c. Control time d. All of these

Last Answer : b. Execution time

What will be the hexadecimal value in the register ax (32-bit) after executing the following instructions? Mov al, 15 Mov ah, 15 Xor al, al Mov cl, 3 Shr ax, cl Codes: (A) 0F00 h (B) 0F0F h (C) 01E0 h (D) FFFF h

Description : What will be the hexadecimal value in the register ax (32-bit) after executing the following instructions? Mov al, 15 Mov ah, 15 Xor al, al Mov cl, 3 Shr ax, cl Codes: (A) 0F00 h (B) 0F0F h (C) 01E0 h (D) FFFF h

Last Answer : (C) 01E0 h

___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory

Description : ___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory

Last Answer : b. Microprocessor

Match the following mechanisms for interrupting the execution of a process and their uses. i) Interrupt a) Call to an operating system function ii) Trap b) Reaction to an asynchronous external event iii) Supervisor Call c) Handling of a error or an exception condition A) i-a, ii-b, iii-c B) i-c, ii-a, iii-b C) i-b, ii-c, iii-a D) i-a, ii-c, iii-b

Description : Match the following mechanisms for interrupting the execution of a process and their uses. i) Interrupt a) Call to an operating system function ii) Trap b) Reaction to an asynchronous external event iii) Supervisor Call c) Handling of a error ... -a, iii-b C) i-b, ii-c, iii-a D) i-a, ii-c, iii-b

Last Answer : C) i-b, ii-c, iii-a

The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read

Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read

Last Answer : d. Address register and read

Interrupt which arises from illegal or erroneous use of an instruction or data is (A) Software interrupt (B) Internal interrupt (C) External interrupt (D) All of the above

Description : Interrupt which arises from illegal or erroneous use of an instruction or data is (A) Software interrupt (B) Internal interrupt (C) External interrupt (D) All of the above

Last Answer : (B) Internal interrupt

System calls are usually invoked by using: (A) A privileged instruction (B) An indirect jump (C) A software interrupt (D) Polling

Description : System calls are usually invoked by using: (A) A privileged instruction (B) An indirect jump (C) A software interrupt (D) Polling

Last Answer : (C) A software interrupt

is an external hardware event which causes the CPU to interrupt the current instruction sequence: a. Input interrupt b. Output interrupt c. Both d. None of these

Description : is an external hardware event which causes the CPU to interrupt the current instruction sequence: a. Input interrupt b. Output interrupt c. Both d. None of these

Last Answer : c. Both

Suppose that the number of instructions executed between page faults is directly proportional to the number of page frames allocated to a program. If the available memory is doubled, the mean interval between page faults is also doubled. Further, consider that a normal instruction takes one micro second, but if a page fault occurs, it takes 2001 micro seconds. If a program takes 60 sec to run, during which time it gets 15000 page faults, how long would it take to run if twice as much memory were available? (A) 60 sec (B) 30 sec (C) 45 sec (D) 10 sec

Description : Suppose that the number of instructions executed between page faults is directly proportional to the number of page frames allocated to a program. If the available memory is doubled, the mean interval between page faults is also ... memory were available? (A) 60 sec (B) 30 sec (C) 45 sec (D) 10 sec

Last Answer : Answer: C Explanation: T = Ninstr x 1µs + 15,000 x 2,000 µs = 60s Ninstr x 1µs = 60,000,000 µs - 30,000,000 µs = 30,000,000 µs Ninstr = 30,000,000 The number of instruction ... doesn't mean that the program runs twice as fast as on the first system. Here, the performance increase is of 25%.

Briefly explain the steps involved in a fetch cycle?

Description : Briefly explain the steps involved in a fetch cycle?

Last Answer : Answer :Fetch cycle is the time required to fetch an opcode from a particular location in memory. General Fetch Cycles consist of 3T states. The first T state involves the sending of the memory address ... . For slower memories the processors has the provision to get in to the WAIT cycles as well.

When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is transferred to the program counter c. two data bytes stored in the top two locations of the stack are transferred to the program counter d. two data bytes stored in the top two locations of the stack are transferred to the stack pointer

Description : When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is ... two data bytes stored in the top two locations of the stack are transferred to the stack pointer

Last Answer : c. two data bytes stored in the top two locations of the stack are transferred to the program counter

The act of acquiring an instruction is referred as the____ the instruction: a. Fetching b. Fetch cycle c. Both a and b d. None of these

Description : The act of acquiring an instruction is referred as the____ the instruction: a. Fetching b. Fetch cycle c. Both a and b d. None of these

Last Answer : a. Fetching

It contains the stack for PC storage during subroutine calls and input/output interrupt services: a. Seven- level hardware b. Eight- level hardware

Description : It contains the stack for PC storage during subroutine calls and input/output interrupt services: a. Seven- level hardware b. Eight- level hardware

Last Answer : b. Eight- level hardware

Debugger is a program that (A) allows to examine and modify the contents of registers (B) does not allow execution of a segment of program (C) allows to set breakpoints, execute a segment of program and display contents of register (D) All of the above

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Last Answer : (C) allows to set breakpoints, execute a segment of program and display contents of register

Who is the represents the fundamental process in the operation of the CPU: a. The fetch-execute cycle and pipelining b. The assembly c. Both A and B d. None of these

Description : Who is the represents the fundamental process in the operation of the CPU: a. The fetch-execute cycle and pipelining b. The assembly c. Both A and B d. None of these

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Last Answer : c) Program Counter

In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack

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Last Answer : b. after OP code in the instruction

The section of the CPU that selects, interprects and monitors the execution of program instructions is (1) Memory (2) Register (3) Control unit (4) ALU

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The advantage of ............... is that it can reference memory without paying the price of having a full memory address in the instruction. (A) Direct addressing (B) Indexed addressing (C) Register addressing (D) Register Indirect addressing

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Last Answer : (D) Register Indirect addressing

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Description : The ............... addressing mode is similar to register indirect addressing mode, except that an offset is added to the contents of the register. The offset and register are specified in the instruction. (A) Base indexed (B) Base indexed plus displacement (C) Indexed (D) Displacement

Last Answer : (D) Displacement

A is written as separate unit, apart from main and called whenever necessary: a. Subroutine b. Code c. Block d. None of these

Description : A is written as separate unit, apart from main and called whenever necessary: a. Subroutine b. Code c. Block d. None of these

Last Answer : a. Subroutine

Before checking the program for errors in translating code into machine language the high level language code is loaded into __ a. Register b. Memory c. Data d. CPU

Description : Before checking the program for errors in translating code into machine language the high level language code is loaded into __ a. Register b. Memory c. Data d. CPU

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Which are contains one or more register that may be referenced by machine instruction: a. Input b. Output c. CPU d. ALU

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Consider a uniprocessor system where new processes arrive at an average of five processes per minute and each process needs an average of 6 seconds of service time. What will be the CPU utilization ? (A) 80 % (B) 50 % (C) 60 % (D) 30 %

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Return instruction is written in_ to written to main program: a. Subroutine b. Main program c. Botha &b d. None of these

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When a subroutine is called, the address of the instruction following the CALL instructions stored in/on the a. stack pointer b. accumulator c. program counter d. stack

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ACALL instruction allows specifying ______address in the instruction and calling subroutine within ______ program memory block. a) 2byte, 3K b) 11bit, 2K c) 9bit, 2K d) 1byte, 3K

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Last Answer : c) 9bit, 2K

Which interrupt services save all the register and flags. a. Save interrupt b. Input/output interrupt c. Service interrupt d. All of these

Description : Which interrupt services save all the register and flags. a. Save interrupt b. Input/output interrupt c. Service interrupt d. All of these

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AVR microcontroller executes most of the instruction in _________________. A. Single execution cycle. B. Double execution cycle. C. Both A& B D. None of the above.

Description : AVR microcontroller executes most of the instruction in _________________. A. Single execution cycle. B. Double execution cycle. C. Both A& B D. None of the above.

Last Answer : architecture of embedded system consists of

The extent nesting in subroutine is limited only by: a. Number of available Stack locations b. Number of available Addressing locations c. Number of available CPU locations d. Number of available Memory locations

Description : The extent nesting in subroutine is limited only by: a. Number of available Stack locations b. Number of available Addressing locations c. Number of available CPU locations d. Number of available Memory locations

Last Answer : a. Number of available Stack locations

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Last Answer : A) Tunnel

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Description : A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored

Last Answer : a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory.

State whether the following statement is true. i) It takes less time to terminate a thread than a process. ii) Threads enhance efficiency in communication between different executing programs. A) i-True, ii-False B) i-True, ii-True C) i-False, ii-True D) i-False, ii-False

Description : State whether the following statement is true. i) It takes less time to terminate a thread than a process. ii) Threads enhance efficiency in communication between different executing programs. A) i-True, ii-False B) i-True, ii-True C) i-False, ii-True D) i-False, ii-False

Last Answer : B) i-True, ii-True

Why 8087 is referred to as Coprocessor? i) Because 8087 is used in parallel with main processor in a system, rather than serving as a main processor itself. ii) Because 8087 is used in serial with main processor in a system, rather than serving as a main processor itself. iii) Because main Microprocessor handles the general program execution and the 8087 handles specialized math computations. a) i & iii b) ii & iii c) iii only. d) i only.

Description : Why 8087 is referred to as Coprocessor? i) Because 8087 is used in parallel with main processor in a system, rather than serving as a main processor itself. ii) Because 8087 is used in serial with main processor in a ... math computations. a) i & iii b) ii & iii c) iii only. d) i only.

Last Answer : c) iii only.

The ……………. Determines when a page should be brought into main memory. A) Fetch policy B) Placement policy C) Replacement policy D) Resident set management

Description : The ……………. Determines when a page should be brought into main memory. A) Fetch policy B) Placement policy C) Replacement policy D) Resident set management

Last Answer : A) Fetch policy

The type(s) of auto executing macros, in Microsoft word is/are A) Auto execute B) Auto macro C) Command macro D) All of the above

Description : The type(s) of auto executing macros, in Microsoft word is/are A) Auto execute B) Auto macro C) Command macro D) All of the above

Last Answer : D) All of the above

The output of executing string.ascii_letters can also be achieved by: a) string.ascii_lowercase_string.digits b) string.ascii_lowercase+string.ascii_upercase c) string.letters d) string.lowercase_string.upercase

Description : The output of executing string.ascii_letters can also be achieved by: a) string.ascii_lowercase_string.digits b) string.ascii_lowercase+string.ascii_upercase c) string.letters d) string.lowercase_string.upercase

Last Answer : d) string.lowercase_string.upercase

Software testing is (A) the process of establishing that errors are not present. (B) the process of establishing confidence that a program does what it is supposed to do. (C) the process of executing a program to show that it is working as per specifications. (D) the process of executing a program with the intent of finding errors.

Description : Software testing is (A) the process of establishing that errors are not present. (B) the process of establishing confidence that a program does what it is supposed to do. (C) the process of ... as per specifications. (D) the process of executing a program with the intent of finding errors. 

Last Answer : (D) the process of executing a program with the intent of finding errors.

_is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these

Description : _is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these

Last Answer : b. Fetch

Pipeline implement a. fetch instruction b. decode instruction c. fetch operand d. calculate operand e. execute instruction f. all of abve

Description : Pipeline implement a. fetch instruction b. decode instruction c. fetch operand d. calculate operand e. execute instruction f. all of abve

Last Answer : f. all of abve