What are basic gates

Question

Please Log in or Register for more.

What are basic gates

73 views

asked Mar 14, 2018 by Aishwarya

1 Answer

Please log in or register to answer this question.

Related Questions

How many minimum number of NOR gates are required to realize a two-input X-OR gate?

How many minimum number of NOR gates are required to realize a two-input X-OR gate?
Last Answer : 5

184 views 2 answers

asked May 24, 2018 by anonymous

In standard TTL gates, the totem pole output stage is primarily used to

In standard TTL gates, the totem pole output stage is primarily used to (A) increase the noise margin of the gate (B) decrease the output switching delay (C) facilitate a wired OR logic connection (D) increase the output impedance of the circuit
Last Answer : In standard TTL gates, the totem pole output stage is primarily used to decrease the output switching delay

1.1k views 1 answer

asked May 24, 2018 by anonymous

The complete set of only those Logic Gates designated as Universal Gates is

The complete set of only those Logic Gates designated as Universal Gates is (A) NOT, OR and AND Gates (B) XNOR, NOR and NAND Gates (C) NOR and NAND Gates (D) XOR, NOR and NAND Gates
Last Answer : The complete set of only those Logic Gates designated as Universal Gates is NOR and NAND Gates

234 views 1 answer

asked May 18, 2018 by anonymous

IC which has quad 2 input AND gates

IC which has quad 2 input AND gates (A) 7411 (B) 7404 (C)7400 (D) 7408
Last Answer : IC which has quad 2 input AND gates 7408

60 views 1 answer

asked May 17, 2018 by anonymous

Which of the following gates can be used to realize all possible combinational logic functions?

Which of the following gates can be used to realize all possible combinational logic functions? (i) OR gate (ii) NOR gate (iii) Exclusive OR gate (iv) NAND gate (v) AND gate (A) (iii), (iv) and (v) (B) (i), (iii) and (iv) (C) (ii) and (iv) (D) (i) and (v)
Last Answer : Which of the following gates can be used to realize all possible combinational logic functions? (i) OR gate (ii) NOR gate (iii) Exclusive OR gate (iv) NAND gate (v) AND gate (A) (iii), (iv) and (v) (B) (i), (iii) and (iv) (C) (ii) and (iv) (D) (i) and (v)

370 views 1 answer

asked Apr 30, 2018 by anonymous

NAND gates are preferred over others because these

Last Answer : NAND gates are preferred over others because these can be used to make any gate.

139 views 1 answer

asked Mar 29, 2018 by anonymous

In integrated circuit electronics the basic universal gate is

Last Answer : In integrated circuit electronics the basic universal gate is AND gate.

370 views 1 answer

asked Mar 28, 2018 by anonymous

How Many Basic Logic Gates ?

How Many Basic Logic Gates ?
Last Answer : Basic Logic Gate three. OR, AND, NOT

0 views 1 answer

asked Jan 28 by anonymous

How many basic gates and what are they ?

How many basic gates and what are they ?
Last Answer : There are three basic gates , namely- ( a) AND (b) OR (c) NOT

0 views 1 answer

asked Jan 27 by anonymous

What are the basic gates ?

What are the basic gates ?
Last Answer : Basic gates AND, OR and NOT .

0 views 1 answer

asked Jan 27 by anonymous

What are the basic logic gates ?

What are the basic logic gates ?
Last Answer : Basic Reasoning Gates. Namely: Or Gate , End Gate and Non Gate.

0 views 1 answer

asked Jan 27 by anonymous

Which of the listed logic gates is considered to be a BASIC building block (basic logic gate) used in logic diagrams? A. NAND B. OR C. NOR D. All of the above.

Which of the listed logic gates is considered to be a BASIC building block (basic logic gate) used in logic diagrams? A. NAND B. OR C. NOR D. All of the above.
Last Answer : Answer: B

5 views 1 answer

asked Jan 4 by itszee

What are the basic digital logic gates?

What are the basic digital logic gates?
Last Answer : The three basic logic gates are • AND gate • OR gate • NOT gate

12 views 1 answer

asked Aug 13, 2021 by anonymous

A basic S -R flip-flop can be constructed by cross -coupling which basic logic gates : -

A basic S -R flip-flop can be constructed by cross -coupling which basic logic gates : - a) AND or OR gates b) XOR or XNOR gates c) NOR or NAND gates d) AND or NOR gates
Last Answer : A basic S -R flip-flop can be constructed by cross -coupling which basic logic gates : - NOR or NAND gates

681 views 1 answer

asked Apr 14, 2018 by anonymous

List out features of any four addressing modes of 8051.

List out features of any four addressing modes of 8051.
Last Answer : 1.Immediate addressing mode: In this Immediate Addressing Mode, the data is provided in the instruction itself. The data is provided immediately after the opcode. These are some examples of Immediate Addressing Mode. MOVA ... us see some examples of this mode. MOV 0E5H, @R0 MOV @R1, 80H

224 views 1 answer

asked May 21, 2020 by anonymous

List out any four assembler directives and state their functions.

List out any four assembler directives and state their functions.
Last Answer : ORG directive: It is used to specify starting address of the Program. A 16bit address follows ORG ORG 0020H will start program from 0020H memory location. END directive: It indicates end of the ... that when the label appears in the program, itp constant value will be substituted for the label.

232 views 1 answer

asked May 21, 2020 by anonymous

State functions of preset, clear, clock and SR inputs related to SR flip flop.

State functions of preset, clear, clock and SR inputs related to SR flip flop.
Last Answer : Preset Input: is an asynchronous input to set the Q output to 1 Clear Input: is also asynchronous input to reset the Q output to 0 Clock Input: is used to input external logic clock pulse (HIGH-LO) to ... set the Q output. And R is the reset input which is used to reset Q output of the flipflop.

179 views 1 answer

asked May 21, 2020 by anonymous

State Demorgan's theorem's and prove both theorems using truth table.

State Demorgan's theorem's and prove both theorems using truth table.
Last Answer : De Morgan's 1st theorem states that when the OR sum of two variables is inverted, this is the same as inverting each variable individually and then ANDing these inverted variables. De Morgan's 2nd ... individually and then ORing them. In Boolean equation form it can be written as

217 views 1 answer

asked May 21, 2020 by anonymous

Define following terms related to logic families : (i) Noise Margin (ii) FAN-OUT (iii) Propagation delay (iv) Power dissipation

Define following terms related to logic families : (i) Noise Margin (ii) FAN-OUT (iii) Propagation delay (iv) Power dissipation
Last Answer : i) Noise immunity is measured in terms of noise margin. High state Noise margin = VNH = VOH(min) - VIH(min) Low state Noise margin = VNL = VIL(max) - VOL(max) i) The fan-out is defined as the ... logical 0 state (HIGH to LOW) iii) Average power dissipation is defined as PD(avg) = ICC(avg) * VCC

137 views 1 answer

asked May 21, 2020 by anonymous

Find out number of data lines required to interface 16 LEDs arrange in the 4 x 4 matrix form.

Find out number of data lines required to interface 16 LEDs arrange in the 4 x 4 matrix form.
Last Answer : 4+4=8, eight lines are required for 4x4 matrix of 16 LEDs

83 views 1 answer

asked May 21, 2020 by anonymous

If initial content of accumulator is 44 H, find out the new content of accumulator after execution of the instruction RR A

If initial content of accumulator is 44 H, find out the new content of accumulator after execution of the instruction RR A
Last Answer : Contents of Acc will be 22H ( as RR A divides acc by 2)

123 views 1 answer

asked May 21, 2020 by anonymous

Identify direct addressing instructions from following instructions : (i) MOV RO, R5 (ii) MOV RO, 80 H (iii) MOV RO, #75H (iv) ADD A, 45 H

Identify direct addressing instructions from following instructions : (i) MOV RO, R5 (ii) MOV RO, 80 H (iii) MOV RO, #75H (iv) ADD A, 45 H
Last Answer : Instructions ii) and iv) are direct addressing as 80H and 45H are direct addresses

113 views 1 answer

asked May 21, 2020 by anonymous

Define the term 'Multiplexer'. State two examples of multiplexer.

Define the term 'Multiplexer'. State two examples of multiplexer.
Last Answer : A digital multiplexer or data selector is a logic circuit that accepts several (many) digital data inputs and selects one of them at any given time to pass on to the output. 1. Two input multiplexer 2. Four input multiplexer 3. Eight input multiplexer

147 views 1 answer

asked May 21, 2020 by anonymous

What is the width of 8085 address bus

77 views 0 answers

asked Mar 20, 2020 by anonymous

Can we create a digital circuit that has as inputs the 3- bit digital words

Can we create a digital circuit that has as inputs the 3- bit digital words [2: 0] A, [2: 0] B and [2: 0] C and its output is equal to |C-A-B| . The circuit of the binary full adder is known.

78 views 0 answers

asked Aug 11, 2018 by vasilishmty97

The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’

The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’ with one of the following conditions by applying A) J = 0, K = 0 and using a clock B) J = 1, K = 0 and using the clock C) Asynchronous preset input D) J = 1, K = 1 and using the clock
Last Answer : The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’ with one of the following conditions by applying J = 1, K = 1 and using the clock

1.7k views 1 answer

asked Jun 17, 2018 by anonymous

Which one of the following logic circuit has the highest speed as compared to the currently available logic

Which one of the following logic circuit has the highest speed as compared to the currently available logic circuits? A) Resistance-transistor logic B) Emitter-coupled logic C) Integrated-injection logic D) Diode-transistor logic
Last Answer : Which one of the following logic circuit has the highest speed as compared to the currently available logic circuits? A) Resistance-transistor logic B) Emitter-coupled logic C) Integrated-injection logic D) Diode-transistor logic

117 views 1 answer

asked Jun 17, 2018 by anonymous

What is the 2's complement of 01101?

What is the 2's complement of 01101? A) 10010 B) 10011 C) 1100 D) 1001
Last Answer : What is the 2's complement of 01101? A) 10010 B) 10011 C) 1100 D) 1001

5.2k views 1 answer

asked Jun 17, 2018 by anonymous

The current mode logic (CML) is same as

The current mode logic (CML) is same as A) LSI B) CMOS C) TTL D) ECL
Last Answer : The current mode logic (CML) is same as ECL

61 views 1 answer

asked Jun 17, 2018 by anonymous

Which code is used in constructing k-maps?

Which code is used in constructing k-maps? A) Hamming code B) 2 out of 5 code C) BCD code D) Gray code
Last Answer : Which code is used in constructing k-maps? A) Hamming code B) 2 out of 5 code C) BCD code D) Gray code

94 views 1 answer

asked Jun 17, 2018 by anonymous

For a NAND gate, when one or more inputs are low then the output will be

For a NAND gate, when one or more inputs are low then the output will be A) Low B) High C) Alternately high and low D) High or low depending on relative magnitude of inputs
Last Answer : For a NAND gate, when one or more inputs are low then the output will be High

145 views 1 answer

asked Jun 17, 2018 by anonymous

Decimal equivalent of Hexadecimal number (C3B1)16 is:

Decimal equivalent of Hexadecimal number (C3B1)16 is: A) 12197 B) 32097 C) 52097 D) 50097
Last Answer : Decimal equivalent of Hexadecimal number (C3B1)16 is: 50097

183 views 1 answer

asked Jun 17, 2018 by anonymous

The IC used for 2:1 multiplexer is

The IC used for 2:1 multiplexer is (A) IC 74150 (B) IC 74151 (C) IC 74153 (D) IC 74157

65 views 0 answers

asked Jun 4, 2018 by anonymous

A bi-stable multi-vibrator can be built by using

A bi-stable multi-vibrator can be built by using (A) NAND gates (B) AND gates (C) AND or OR gates (D) Excusive-NOR gates

89 views 0 answers

asked Jun 4, 2018 by anonymous

A NOR gate is equivalent to a bubbled AND gate. This statement is an outcome of:

A NOR gate is equivalent to a bubbled AND gate. This statement is an outcome of: (1) De Morgan’s Law (2) Involution Law (3) Law of Absorption (4) Idempotent Law
Last Answer : A NOR gate is equivalent to a bubbled AND gate. This statement is an outcome of: De Morgan’s Law

194 views 1 answer

asked May 29, 2018 by anonymous

Initially the number decimal 8 is stored. If instruction RAL is executed twice, the final number stored will be:

Initially the number decimal 8 is stored. If instruction RAL is executed twice, the final number stored will be: (1) Decimals 8 (2) Decimal 16 (3) Decimal 32 (4) Decimal 2
Last Answer : Initially the number decimal 8 is stored. If instruction RAL is executed twice, the final number stored will be: Decimal 32

108 views 1 answer

asked May 28, 2018 by anonymous

Determine the output frequency for a frequency division circuit that contains 12 flip–flops with an input

Determine the output frequency for a frequency division circuit that contains 12 flip–flops with an input clock frequency of 20.48 MHz: (1) 10.24 kHz (2) 5 kHz (3) 30.24 kHz (4) 15 kHz
Last Answer : Determine the output frequency for a frequency division circuit that contains 12 flip–flops with an input clock frequency of 20.48 MHz: 5 kHz

480 views 1 answer

asked May 28, 2018 by anonymous

The output of an exclusive–NOR gate is 1. Which input combination is correct?

The output of an exclusive–NOR gate is 1. Which input combination is correct? (1) A = 1, B = 0 (2) A = 0, B = 1 (3) A = 0, B = 0 (4) None of these
Last Answer : The output of an exclusive–NOR gate is 1. Which input combination is correct? (1) A = 1, B = 0 (2) A = 0, B = 1 (3) A = 0, B = 0 (4) None of these

443 views 1 answer

asked May 28, 2018 by anonymous

How many flip-flops are required to build a binary counter circuit to count from 0 to 1023 ?

How many flip-flops are required to build a binary counter circuit to count from 0 to 1023 ? (a) 1 (b) 6 (c) 10 (d) 23
Last Answer : (c)10

2.8k views 2 answers

asked May 26, 2018 by anonymous

In a positive edge triggered JK flip-flop, J = 1, K = 0 and clock pulse is rising, Q will be

In a positive edge triggered JK flip-flop, J = 1, K = 0 and clock pulse is rising, Q will be (a) 0 (b) 1 (c) showing no change (d) toggle
Last Answer : In a positive edge triggered JK flip-flop, J =1, K= 0 and clock pulse is rising, a Q will be 1

354 views 1 answer

asked May 26, 2018 by anonymous

Output of NAND gate is 0. for three inputs when:

Output of NAND gate is 0. for three inputs when:
Last Answer : Output of NAND gate is 0. for three inputs when: all the inputs are 1

105 views 1 answer

asked May 24, 2018 by anonymous

In a PLL, lock occurs when the

In a PLL, lock occurs when the (A) input frequency and the VCO frequency are the same (B) Phase error is 1800 (C) VCO frequency is double the input frequency (D) Phase error is 900
Last Answer : In a PLL, lock occurs when the input frequency and the VCO frequency are the same

105 views 1 answer

asked May 24, 2018 by anonymous

The following logic families have their propagation delay. Arrange them from lowest propagation delay to

The following logic families have their propagation delay. Arrange them from lowest propagation delay to highest propagation delay. 1. TTL (Standard) 2. ECL 3. Low power CMOS 4. DTL (A) 2, 1, 4 and 3 (B) 2, 4, 1 and 3 (C) 4, 2, 3 and 1 (D) 1, 2, 3 and 4
Last Answer : The following logic families have their propagation delay. Arrange them from lowest propagation delay to highest propagation delay. 1. TTL (Standard) 2. ECL 3. Low power CMOS 4. DTL (A) 2, 1, 4 and 3 (B) 2, 4, 1 and 3 (C) 4, 2, 3 and 1 (D) 1, 2, 3 and 4

82 views 1 answer

asked May 24, 2018 by anonymous

In successive approximation converter input to the comparator is through

In successive approximation converter input to the comparator is through (A) DAC (B) Latch (C) Flip-flop (D) Sample and hold circuit
Last Answer : In successive approximation converter input to the comparator is through DAC

79 views 1 answer

asked May 24, 2018 by anonymous

Read the following statements: i. Gate is a combinational logic. ii. JK Flip-flop in toggle mode is not

Read the following statements: i. Gate is a combinational logic. ii. JK Flip-flop in toggle mode is not combinational logic. iii. MSJK Flip-flop suffers from race-around. iv. Counters are sequential circuits. Which choice is correct? (A) i, ii (B) i, ii, iv (C) ii, iii, iv (D) i, ii, iii
Last Answer : Read the following statements: i. Gate is a combinational logic. ii. JK Flip-flop in toggle mode is not combinational logic. iii. MSJK Flip-flop suffers from race-around. iv. Counters are sequential circuits. Which choice is ... (A) i, ii (B) i, ii, iv (C) ii, iii, iv (D) i, ii, iii

82 views 1 answer

asked May 24, 2018 by anonymous

Which of the following peripherals provide I/O facilities?

Which of the following peripherals provide I/O facilities? i. 8279 ii. 8155 iii. 8259 iv. 8255 (A) i, ii (B) ii, iii (C) iii, iv (D) ii, iv
Last Answer : Which of the following peripherals provide I/O facilities? i. 8279 ii. 8155 iii. 8259 iv. 8255 (A) i, ii (B) ii, iii (C) iii, iv (D) ii, iv

78 views 1 answer

asked May 24, 2018 by anonymous

Which of the following is error correcting code?

Which of the following is error correcting code? (A) EBCDIC (B) GRAY (C) Hamming (D) ASCII
Last Answer : Which of the following is error correcting code? (A) EBCDIC (B) GRAY (C) Hamming (D) ASCII

141 views 1 answer

asked May 24, 2018 by anonymous

The number of switching functions of 3 variables is

The number of switching functions of 3 variables is (A) 8 (B) 64 (C) 128 (D) 256
Last Answer : The number of switching functions of 3 variables is 8

178 views 1 answer

asked May 24, 2018 by anonymous

The decimal equivalent of the hexadecimal number E5 is

The decimal equivalent of the hexadecimal number E5 is (a) 279 (b) 229 (c) 427 (d) 3000

84 views 0 answers

asked May 23, 2018 by anonymous

No. of flip-flops used in decade counter

No. of flip-flops used in decade counter (a) 3 (b) 2 (c) 4 (d) None of these
Last Answer : 4

102 views 1 answer

asked May 23, 2018 by anonymous

anonymous · Answer 1 · 2018-03-14T22:42:06+0000

AND, OR, NOT, NAND, NOR, XOR and XNOR are the seven basic gates in digital electronics.

What are basic gates

Please log in or register to add a comment.

1 Answer

Answer :

Please log in or register to add a comment.

Please log in or register to answer this question.

Related Questions