Description : The upper red arrow show that CPU sends out the control signals____ and _____ indicate the data is read from the memory: a. Memory request b. Read c. Both A and B d. None of these
Last Answer : c. Both A and B
Description : In 8096, CCB bit 3 is ____. a) write strobe mode select b) address valid strobe select c) bus width select d) Internal read control mode
Last Answer : c) bus width select
Last Answer : b) address valid strobe select
Description : The ____ place the data from a register onto the data bus: a. CPU b. ALU c. Both A and B d. None of these
Last Answer : a. CPU
Description : CPU can read & write data by using : a. Control bus b. Data bus c. Address bus d. None of these
Last Answer : b. Data bus
Description : The CPU removes the ___ signal to complete the memory write operation: a. Read b. Write c. Both A and B d. None of these
Last Answer : a. Read
Description : The CPU completes yields control of the bus to the DMA controller via: a. DMA acknowledge signal b. DMA integrated signal c. DMA implicitly signal d. None of these
Last Answer : a. DMA acknowledge signal
Description : Which is not the control bus signal: a. READ b. WRITE c. RESET
Last Answer : c. RESET
Description : The ________ ensures that only one IC is active at a time to avoid a bus conflict caused by two ICs writing different data to the same bus.A.control busB.control instructionsC. address decoder D.CPU
Last Answer : C. address decoder
Description : The lower red curvy arrow show that CPU places the address extracted from the memory location on the_____: a. Address bus b. System bus c. Control bus d. Data bus
Last Answer : a. Address bus
Description : The information on the data bus is transferred to the ______register: a. MOC b. MDR c. VAM d. CPU
Last Answer : b. MDR
Description : Which bus transfer singles from the CPU to external device and others that carry singles from external device to the CPU: a. Control bus b. Data bus c. Address bus d. None of these
Last Answer : a. Control bus
Description : The information is transferred from the_____ and ____ specified register: a. MDR b. CPU c. Both A and B
Description : Which is the components of computer: a. System Bus b. CPU c. Memory Unit d. All of these
Last Answer : d. All of these
Description : Which of the following are the two main components of the CPU? a. Control unit and registers b. Registers and main memory c. Control Unit and ALU d. ALU and bus
Last Answer : c. Control Unit and ALU
Description : Which Bus connects CPU & level 2 cache: a. Rear side bus b. Front side bus c. Memory side bus d. None of these
Last Answer : b. Front side bus
Description : In 8279, a scanned sensor matrix mode, if a sensor changes its state, the ___ line goes ____ to interrupt the CPU. a) CS, high b) A0, high c) IRQ, high d) STB, high
Last Answer : c) IRQ, high
Description : In linear decoding address bus of 16-bit wide can connect only ____ of RAM. a. 16 KB b. 6KB c. 12KB d. 64KB
Last Answer : b. 6KB
Description : The CPU of a system having 1 MIPS execution rate needs 4 machine cycles on an average for executing an instruction. The fifty percent of the cycles use memory bus. A memory read/write employs one machine cycle. For ... (A) 500 Kbytes/sec (B) 2.2 Mbytes/sec (C) 125 Kbytes/sec (D) 250 Kbytes/sec
Last Answer : (D) 250 Kbytes/sec
Description : In 8279, the keyboard entries are debounced and stored in an _________, that is further accessed by the CPU to read the key codes. a) 8-bit FIFO b) 8-byte FIFO c) 16 byte FIFO d) 16 bit FIFO
Last Answer : b) 8-byte FIFO
Description : What is the control unit's function in the CPU? a. To transfer data to primary storage b. to store program instruction c. to perform logic operations d. to decode program instruction
Last Answer : b. to store program instruction
Description : CPU does not perform the operation a. data transfer b. logic operation c. arithmetic operation d. all of above
Last Answer : b. logic operation
Description : Where does a computer add and compare data? a. Hard disk b. Floppy disk c. CPU chip d. Memory chip
Last Answer : c. CPU chip
Description : Which computer memory is used for storing programs and data currently being processed by the CPU? a. Mass memory b. Internal memory c. Non-volatile memory d. PROM
Last Answer : b. Internal memory
Description : . An online backing storage system capable of storing larger quantities of data is a. CPU b. Memory c. Mass storage d. Secondary storage
Last Answer : c. Mass storage
Description : An error in computer data is called a. Chip b. Bug c. CPU d. Storage device
Last Answer : b. Bug
Description : Which pin of port 3 is has an alternative function as write control signal for external data memory? a) P3.8 b) P3.3 c) P3.6 d) P3.1
Last Answer : d) P3.1
Last Answer : c) P3.6
Description : System Bus Contains: a. Address Bus b. Data Bus c. Control Bus d. All of these
Description : Which bus carry addresses: a. System bus b. Address bus c. Control bus d. Data bus
Last Answer : b. Address bus
Description : _____ a subsystem that transfer data between computer components inside a computer or between computer: a. Chip b. Register c. Processor d. Bus
Last Answer : d. Bus
Description : What does microprocessor speed depends on? a) Clock b) Data bus width c) Address bus width
Last Answer : c) Address bus width
Description : Why 8085 processor is called an 8 bit processor? a) Because 8085 processor has 8 bit ALU. b) Because 8085 processor has 8 bit data bus. c) a & b.
Last Answer : a) Because 8085 processor has 8 bit ALU.
Description : Reading data is performed in magnetic disk by a. Read/write leads b. Sectors c. Track d. Lower surface
Last Answer : a. Read/write leads
Description : When memory write or I/O read are active data is from the processor: a. Input b. Output c. Processor d. None of these
Last Answer : b. Output
Description : In 8279 Status Word, data is read when ________ pins are low, and write to the display RAM with ____________ are low. a) A0, CS, RD & A0, WR, CS. b) CS, WR, A0 & A0, CS, RD c) A0, RD & WR, CS d) CS, RD & A0, CS.
Last Answer : c) A0, RD & WR, CS
Description : The microprocessor can read/write 16 bit data from or to ________ A. memory B. I /O device C. processor D. register
Last Answer : The microprocessor can read/write 16 bit data from or to memory
Description : Who is the represents the fundamental process in the operation of the CPU: a. The fetch-execute cycle and pipelining b. The assembly c. Both A and B d. None of these
Last Answer : a. The fetch-execute cycle and pipelining
Description : The value memvar must be transferred to the ___: a. Computer b. CPU c. Both A and B d. None of these
Last Answer : b. CPU
Description : Which statement is valid about computer program? a. It is understood by a computer b. It is understood by programmer c. It is understood user d. Both of above
Last Answer : d. Both of above
Description : Which statement is valid about magnetic tape? a. It is a plastic ribbon b. It is coated on both sides with iron oxide c. It can be erased and reused d. All of above
Last Answer : a. It is a plastic ribbon
Description : In 8279 Strobed input mode, the control line goes low. The data on return lines is strobed in the ____. a) FIFO byte by byte b) FILO byte by byte c) LIFO byte by byte d) LILO byte by byte.
Last Answer : a) FIFO byte by byte
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : 8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH 17. If the __ pin is ___ , then we have the option ... b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal
Last Answer : c) EA, high, external, internal
Description : Which statement is false about WR signal: a. WR signal controls the input buffer b. The bar over WR means that this is an active low signal c. The bar over WR means that this is an active high signal d. If WR is 0 then the input data reaches the latch input
Last Answer : c. The bar over WR means that this is an active high signal
Description : Which bus plays a crucial role in I/O: a. System bus b. Control bus c. Address bus d. Both A and B
Last Answer : b. Control bus
Description : The problem of bus confect and sparse address distribution are eliminated by the use of ______ address technique: a. Fully decoding b. Half decoding c. Both a & b d. None of these
Last Answer : a. Fully decoding
Description : The network of wires or electronic path ways on mother board back side: a. PCB b. BUS c. BOTH A and B d. None of these
Last Answer : c. BOTH A and B
Description : PC’s use____ based on this architecture: a. CPU b. ALU c. MU
Description : Which process information at a much faster rate than it can retrieve it from memory: a. ALU b. Processor c. Microprocessor d. CPU
Last Answer : d. CPU