Description : Explain the design procedure for combinational circuits
Last Answer : 1. The problem definition 2. Determine the number of available input variables & required O/P variables. 3. Assigning letter symbols to I/O variables 4. Obtain simplified Boolean expression for each O/P. 5. Obtain the logic diagram.
Description : Explain the working of BCD Ripple Counter with the help of state diagram and logic diagram.
Last Answer : • BCD Ripple Counter Count sequence • Truth Table • State diagram representing the Truth Table • Truth Table for the J-K Flip Flop • Logic Diagram
Description : Design a logic circuit to convert the BCD code to Excess –
Last Answer : code. • Truth Table for BCD to Excess – 3 conversion. • K-map simplification • Logic circuit implementing the Boolean Expression
Description : What is field programmable logic array?
Last Answer : The second type of PLA is called a field programmable logic array. The user by means of certain recommended procedures can program the EPLA.
Description : What is programmable logic array? How it differs from ROM?
Last Answer : In some cases the number of don’t care conditions is excessive, it is more economical to use a second type of LSI component called a PLA. A PLA is similar to a ROM in concept; however it does not provide full decoding of the variables and does not generates all the min-terms as in the ROM.
Description : List basic types of programmable logic devices.
Last Answer : 1. . Read only memory 2. . Programmable logic Array 3. . Programmable Array Logic
Description : What are the types of TTL logic?
Last Answer : 1. Open collector output 2. Totem-Pole Output 3. Tri-state output.
Description : What is High Threshold Logic?
Last Answer : Some digital circuits operate in environments, which produce very high noise signals. For operation in such surroundings there is available a type of DTL gate which possesses a high threshold to noise immunity. This type of gate is called HTL logic or High Threshold Logic.
Description : Mention the classification of saturated bipolar logic families.
Last Answer : The bipolar logic family is classified as follows: • RTL- Resistor Transistor Logic • DTL- Diode Transistor logic • I2L- Integrated Injection Logic • TTL- Transistor Transistor Logic • ECL- Emitter Coupled Logic
Description : Classify the logic family by operation?
Last Answer : The Bipolar logic family is classified into Saturated logic Unsaturated logic. The RTL, DTL, TTL, I2L, HTL logic comes under the saturated logic family. The Schottky TTL, and ECL logic comes under the unsaturated logic family.
Description : Give the classification of logic families
Last Answer : Bipolar Unipolar Saturated Non Saturated PMOS NMOS CMOS RTL Schottky TTL ECL DTL I I L TTL
Description : What is a Logic gate?
Last Answer : Logic gates are the basic elements that make up a digital system. The electronic gate is a circuit that is able to operate on a number of binary inputs in order to perform a Particular logical function.
Description : What are the basic digital logic gates?
Last Answer : The three basic logic gates are • AND gate • OR gate • NOT gate
Description : Define combinational logic
Last Answer : When logic gates are connected together to produce a specified output for certain specified combinations of input variables, with no storage involved, the resulting circuit is called combinational logic.
Description : Define shift registers.
Last Answer : Define shift registers.
Description : Define registers.
Last Answer : A register is a group of flip-flops flip-flop can store one bit information. So an n bit register has a group of n flip-flops and is capable of storing any binary information/number containing n-bits.
Description : Define propagation delay.
Last Answer : A propagation delay is the time required to change the output after the application of the input.
Description : Define hold time.
Last Answer : The hold time is the minimum time for which the voltage levels at the excitation inputs must remain constant after the triggering edge of the clock pulse in order for the levels to be reliably clocked into the flip flop. It is denoted as thold .
Description : Define setup time.
Last Answer : The setup time is the minimum time required to maintain a constant voltage levels at the excitation inputs of the flip-flop device prior to the triggering edge of the clock pulse in order for the levels to be reliably clocked into the flip flop. It is denoted as tsetup.
Description : Define skew and clock skew
Last Answer : The phase shift between the rectangular clock waveforms is referred to as skew and the time delay between the two clock pulses is called clock skew.
Description : Define fall time.
Last Answer : The time required to change the voltage level from 90% to 10% is known as fall time(tf).
Description : Define rise time.
Last Answer : The time required to change the voltage level from 10% to 90% is known as rise time(tr).
Description : Define race around condition.
Last Answer : In JK flip-flop output is fed back to the input. Therefore change in the output results change in the input. Due to this in the positive half of the clock pulse if both J and K are high then output toggles continuously. This condition is called ‘race around condition’.
Description : Define Flip flop.
Last Answer : The basic unit for storage is flip flop. A flip-flop maintains its output state either at 1 or 0 until directed by an input signal to change its state.
Description : Define PROM.
Last Answer : PROM is Programmable Read Only Memory. It consists of a set of fixed AND gates connected to a decoder and a programmable OR array.
Description : Define PLD.Give the classification of PLDs.
Last Answer : PLDs are classified as PROM (Programmable Read Only Memory), Programmable Logic Array (PLA), Programmable Array Logic (PAL), and Generic Array Logic (GAL)
Description : Define address and word:
Last Answer : In a ROM, each bit combination of the input variable is called on address. Each bit combination that comes out of the output lines is called a word.
Description : . Define multiplexer?
Last Answer : Multiplexer is a digital switch. If allows digital information from several sources to be routed onto a single output line.
Description : Define Encoder?
Last Answer : An encoder has 2n input lines and n output lines. In encoder the output lines generate the binary code corresponding to the input value.
Description : Define Decoder?
Last Answer : A decoder is a multiple - input multiple output logic circuits that converts coded inputs into coded outputs where the input and output codes are different.
Description : Define half adder and full adder
Last Answer : The logic circuit that performs the addition of two bits is a half adder. The circuit that performs the addition of three bits is a full adder.
Description : Define fan in?
Last Answer : Fan in is the number of inputs connected to the gate without any degradation in the voltage level.
Description : Define noise margin?
Last Answer : It is the maximum noise voltage added to an input signal of a digital circuit that does not cause an undesirable change in the circuit output. It is expressed in volts.
Description : Define power dissipation?
Last Answer : Power dissipation is measure of power consumed by the gate when fully driven by all its inputs.
Description : Define Fan-out?
Last Answer : Fan out specifies the number of standard loads that the output of the gate can drive with out impairment of its normal operation.
Description : If the control signals are generated by combinational logic, then they are generated by a type of _______________ controlled unit. a) Micro programmed b) Software c) Logic d) Hardwired
Last Answer : Answer: d Explanation: The main task of a control unit is to generate control signals. There are two main types of control units: A hardwired control unit generates control ... combinational logic circuits and the Micro programmed control unit generates control signals by using some softwares
Description : Which is the important part of a combinational logic block: a. Index register b. Barrel shifter c. Both a & b d. None of these
Last Answer : b. Barrel shifter
Description : Which of the following logic operations is performed by the following given combinational circuit ? (A) EXCLUSIVE-OR (B) EXCLUSIVE-NOR (C) NAND (D) NOR
Last Answer : (A) EXCLUSIVE-OR
Description : Compare combinational logic circuit and sequential logic circuit
Last Answer : Combinational logic Sequential logic The combinational logic circuit consists of logic gate only Sequential logic circuit consists of combinational logic circuit along with memory for storage of ... , multiplexer, demultiplexer etc E.g. counters, shift registers flip-flop etc
Description : Read the following statements: i. Gate is a combinational logic. ii. JK Flip-flop in toggle mode is not combinational logic. iii. MSJK Flip-flop suffers from race-around. iv. Counters are sequential circuits. Which choice is correct? (A) i, ii (B) i, ii, iv (C) ii, iii, iv (D) i, ii, iii
Last Answer : Read the following statements: i. Gate is a combinational logic. ii. JK Flip-flop in toggle mode is not combinational logic. iii. MSJK Flip-flop suffers from race-around. iv. Counters are sequential circuits. Which choice is ... (A) i, ii (B) i, ii, iv (C) ii, iii, iv (D) i, ii, iii
Description : Which of the following gates can be used to realize all possible combinational logic functions? (i) OR gate (ii) NOR gate (iii) Exclusive OR gate (iv) NAND gate (v) AND gate (A) (iii), (iv) and (v) (B) (i), (iii) and (iv) (C) (ii) and (iv) (D) (i) and (v)
Last Answer : Which of the following gates can be used to realize all possible combinational logic functions? (i) OR gate (ii) NOR gate (iii) Exclusive OR gate (iv) NAND gate (v) AND gate (A) (iii), (iv) and (v) (B) (i), (iii) and (iv) (C) (ii) and (iv) (D) (i) and (v)
Description : Explain the different methods of state assignment
Last Answer : • Three row state assignment • Shared row state assignment • Four row flow table • Multiple row state assignment • Prevention of races can happen only when S=0 and R=1.
Description : Explain in detail about Races.
Last Answer : • Basics of races • Problem created due to races • Classification of races • Remedy for races • cycles
Description : Design a asynchronous sequential circuit with 2 inputs T and C. The output attains a value of 1 when T = 1 & c moves from 1 to 0. Otherwise the output is 0
Last Answer : • Obtain the state diagram • Obtain the flow table • Using implication table reduce the flow table • Using merger graph obtain maximal compatibles • Verify closed & covered conditions • Plot the reduced flow table • Obtain transition table • Excitation table • Logic diagram
Description : State with a neat example the method for the minimization of primitive flow table.
Last Answer : • Consider a state diagram • Obtain the flow table • Using implication table reduce the flow table • Using merger graph obtain maximal compatibles • Verify closed & covered conditions • Plot the reduced flow table
Description : Explain with neat diagram the different hazards and the way to eliminate them.
Last Answer : • Classification of hazards • Static hazard & Dynamic hazard definitions • K map for selected functions • Method of elimination • Essential hazards
Description : Explain in detail about serial in serial out shift register.
Last Answer : • Block diagram • Theoretical explanation • Logic diagram • Working
Description : Design a sequential detector which produces an output 1 every time the input sequence 1011 is detected.
Last Answer : • Construct state diagram • Obtain the flow table • Obtain the flow table & output table • Transition table • Select flip flop • Excitation table
Description : mplement W (A,B,C,D) = Ʃ (2,12,13)
Last Answer : X(A,B,C,D) = Ʃ (7,8,9,10,11,12,13,14,15) Y(A,B,C,D) = Ʃ (0,2,3,4,5,6,7,8,10,11,15) Z (A,B,C,D) = Ʃ (1,2,8,12,13) using PAL(16) • Table • PAL implementation