The ……………. Determines when a page should be brought into main memory. A) Fetch policy B) Placement policy C) Replacement policy D) Resident set management

The ……………. Determines when a page should be brought into main memory. A) Fetch policy
B) Placement policy
C) Replacement policy
D) Resident set management
by

1 Answer

Answer :

A) Fetch policy
by

Related questions

A job has four pages A, B, C, D and the main memory has two page frames only. The job needs to process its pages in following order: ABACABDBACD Assuming that a page interrupt occurs when a new page is brought in the main memory, irrespective of whether the page is swapped out or not. The number of page interrupts in FIFO and LRU page replacement algorithms are (A) 9 and 7 (B) 7 and 6 (C) 9 and 8 (D) 8 and 6

Description : A job has four pages A, B, C, D and the main memory has two page frames only. The job needs to process its pages in following order: ABACABDBACD Assuming that a page interrupt occurs when a new page is brought in the main ... replacement algorithms are (A) 9 and 7 (B) 7 and 6 (C) 9 and 8 (D) 8 and 6

Last Answer : (C) 9 and 8

With ................ a page is brought into main memory only when the reference is made to a location on that page. A) demand paging B) main paging C) prepaging D) postpaging

Description : With ................ a page is brought into main memory only when the reference is made to a location on that page. A) demand paging B) main paging C) prepaging D) postpaging

Last Answer : A) demand paging

With …………………. A page is written out to secondary memory only when it has been selected for replacement. A) pre-cleaning B) demand cleaning C) required cleaning D) fast cleaning

Description : With …………………. A page is written out to secondary memory only when it has been selected for replacement. A) pre-cleaning B) demand cleaning C) required cleaning D) fast cleaning

Last Answer : B) demand cleaning

Consider a program that consists of 8 pages (from 0 to 7) and we have 4 page frames in the physical memory for the pages. The page reference string is : 1 2 3 2 5 6 3 4 6 3 7 3 1 5 3 6 3 4 2 4 3 4 5 1 The number of page faults in LRU and optimal page replacement algorithms are respectively (without including initial page faults to fill available page frames with pages): (A) 9 and 6 (B) 10 and 7 (C) 9 and 7 (D) 10 and 6

Description : Consider a program that consists of 8 pages (from 0 to 7) and we have 4 page frames in the physical memory for the pages. The page reference string is :  1 2 3 2 5 6 3 4 6 3 7 3 1 5 3 6 3 4 2 4 3 4 5 ... to fill available page frames with pages): (A) 9 and 6 (B) 10 and 7 (C) 9 and 7 (D) 10 and 6

Last Answer : (B) 10 and 7

Suppose that the virtual Address space has eight pages and physical memory with four page frames. If LRU page replacement algorithm is used, .............. number of page faults occur with the reference string. 0 2 1 3 5 4 6 3 7 4 7 3 3 5 5 3 1 1 1 7 2 3 4 1 (A) 11 (B) 12 (C) 10 (D) 9

Description : Suppose that the virtual Address space has eight pages and physical memory with four page frames. If LRU page replacement algorithm is used, .............. number of page faults occur with the reference string. 0 2 1 3 5 4 6 3 7 4 7 3 3 5 5 3 1 1 1 7 2 3 4 1 (A) 11 (B) 12 (C) 10 (D) 9

Last Answer : (A) 11

A memory management system has 64 pages with 512 bytes page size. Physical memory consists of 32 page frames. Number of bits required in logical and physical address are respectively: (1) 14 and 15 (2) 14 and 29 (3) 15 and 14 (4) 16 and 32

Description : A memory management system has 64 pages with 512 bytes page size. Physical memory consists of 32 page frames. Number of bits required in logical and physical address are respectively: (1) 14 and 15 (2) 14 and 29 (3) 15 and 14 (4) 16 and 32

Last Answer : (3) 15 and 14

A LRU page replacement is used with four page frames and eight pages. How many page faults will occur with the reference string 0172327103 if the four frames are initially empty? (A) 6 (B) 7 (C) 5 (D) 8

Description : A LRU page replacement is used with four page frames and eight pages. How many page faults will occur with the reference string 0172327103 if the four frames are initially empty? (A) 6 (B) 7 (C) 5 (D) 8

Last Answer : (B) 7

Consider the reference string 0 1 2 3 0 1 4 0 1 2 3 4 If FIFO page replacement algorithm is used, then the number of page faults with three page frames and four page frames are .......... and ........... respectively. (A) 10, 9 (B) 9, 9 (C) 10, 10 (D) 9, 10

Description : Consider the reference string 0 1 2 3 0 1 4 0 1 2 3 4 If FIFO page replacement algorithm is used, then the number of page faults with three page frames and four page frames are .......... and ........... respectively. (A) 10, 9 (B) 9, 9 (C) 10, 10 (D) 9, 10

Last Answer : (D) 9, 10

Briefly explain the steps involved in a fetch cycle?

Description : Briefly explain the steps involved in a fetch cycle?

Last Answer : Answer :Fetch cycle is the time required to fetch an opcode from a particular location in memory. General Fetch Cycles consist of 3T states. The first T state involves the sending of the memory address ... . For slower memories the processors has the provision to get in to the WAIT cycles as well.

A CPU handles interrupt by executing interrupt service subroutine................. (A) by checking interrupt register after execution of each instruction (B) by checking interrupt register at the end of the fetch cycle (C) whenever an interrupt is registered (D) by checking interrupt register at regular time interval

Description : A CPU handles interrupt by executing interrupt service subroutine................. (A) by checking interrupt register after execution of each instruction (B) by checking interrupt register ... cycle (C) whenever an interrupt is registered (D) by checking interrupt register at regular time interval

Last Answer : (A) by checking interrupt register after execution of each instruction

Working set model is used in memory management to implement the concept of (A) Swapping (B) Principal of Locality (C) Segmentation (D) Thrashing

Description : Working set model is used in memory management to implement the concept of (A) Swapping (B) Principal of Locality (C) Segmentation (D) Thrashing

Last Answer : (B) Principal of Locality

………. Involves treating main memory as a resource to be allocated to and shared among a number of active processes. A) Partition management B) Memory management C) Disk management D) All of the above

Description : ………. Involves treating main memory as a resource to be allocated to and shared among a number of active processes. A) Partition management B) Memory management C) Disk management D) All of the above

Last Answer : B) Memory management

What is the most appropriate function of Memory Management Unit (MMU) ? (A) It is an associative memory to store TLB (B) It is a technique of supporting multiprogramming by creating dynamic partitions (C) It is a chip to map virtual address to physical address (D) It is an algorithm to allocate and deallocate main memory to a process

Description : What is the most appropriate function of Memory Management Unit (MMU) ? (A) It is an associative memory to store TLB (B) It is a technique of supporting multiprogramming by creating dynamic partitions ... to physical address (D) It is an algorithm to allocate and deallocate main memory to a process 

Last Answer : (C) It is a chip to map virtual address to physical address

What steps shall be required to rotate an object about the point P1 (as shown in fig.1) and its placement such that what was at P1 is now reduced and is at P2 (as shown in fig.2). Image I. Translate P1 to origin II. Scale as required III. Rotate IV. Translate to the final position P2. (A) I,II and III (B) II,III and IV (C) I,III and IV (D) All of the above

Description : What steps shall be required to rotate an object about the point P1 (as shown in fig.1) and its placement such that what was at P1 is now reduced and is at P2 (as shown in fig.2). I. Translate P1 to origin II. ... (A) I,II and III (B) II,III and IV (C) I,III and IV (D) All of the above

Last Answer : Answer: Marks given to all

Which basic property determines a colored light's placement on the spectrum of visible light?

Description : Which basic property determines a colored light's placement on the spectrum of visible light?

Last Answer : Most of the spectrum charts that I have seen are listed inwavelengths, particularly nanometers (nm). Where 1 nm = 1x10^-9m.

What determines the placement of the catcher cavity?

Description : What determines the placement of the catcher cavity?

Last Answer : The frequency period of the buncher grid signal

Let the page fault service time be 10 millisecond(ms) in a computer with average memory access time being 20 nanosecond(ns). If one page fault is generated for every 106 memory accesses, what is the effective access time for memory? (A) 21 ns (B) 23 ns (C) 30 ns (D) 35 ns

Description : Let the page fault service time be 10 millisecond(ms) in a computer with average memory access time being 20 nanosecond(ns). If one page fault is generated for every 106 memory accesses, what is the effective access time for memory? (A) 21 ns (B) 23 ns (C) 30 ns (D) 35 ns

Last Answer : (C) 30 ns

In a demand paging memory system, page table is held in registers. The time taken to service a page fault is 8 m.sec. if an empty frame is available or if the replaced page is not modified, and it takes 20 m.secs., if the replaced page is modified. What is the average access time to service a page fault assuming that the page to be replaced is modified 70% of the time ? (A) 11.6 m.sec. (B) 16.4 m.sec. (C) 28 m.sec. (D) 14 m.sec.

Description : In a demand paging memory system, page table is held in registers. The time taken to service a page fault is 8 m.sec. if an empty frame is available or if the replaced page is not modified, and it takes 20 m.secs., if the replaced ... ? (A) 11.6 m.sec. (B) 16.4 m.sec. (C) 28 m.sec. (D) 14 m.sec.

Last Answer : (B) 16.4 m.sec. 

Suppose that the number of instructions executed between page faults is directly proportional to the number of page frames allocated to a program. If the available memory is doubled, the mean interval between page faults is also doubled. Further, consider that a normal instruction takes one micro second, but if a page fault occurs, it takes 2001 micro seconds. If a program takes 60 sec to run, during which time it gets 15000 page faults, how long would it take to run if twice as much memory were available? (A) 60 sec (B) 30 sec (C) 45 sec (D) 10 sec

Description : Suppose that the number of instructions executed between page faults is directly proportional to the number of page frames allocated to a program. If the available memory is doubled, the mean interval between page faults is also ... memory were available? (A) 60 sec (B) 30 sec (C) 45 sec (D) 10 sec

Last Answer : Answer: C Explanation: T = Ninstr x 1µs + 15,000 x 2,000 µs = 60s Ninstr x 1µs = 60,000,000 µs - 30,000,000 µs = 30,000,000 µs Ninstr = 30,000,000 The number of instruction ... doesn't mean that the program runs twice as fast as on the first system. Here, the performance increase is of 25%.

A virtual memory has a page size of 1K words. There are eight pages and four blocks. The associative memory page table contains the following entries: Image Which of the following list of virtual addresses (in decimal) will not cause any page fault if referenced by the CPU? (A) 1024, 3072, 4096, 6144 (B) 1234, 4012, 5000, 6200 (C) 1020, 3012, 6120, 8100 (D) 2021, 4050, 5112, 7100

Description : A virtual memory has a page size of 1K words. There are eight pages and four blocks. The associative memory page table contains the following entries:  Which of the following list of virtual addresses (in ... 1234, 4012, 5000, 6200 (C) 1020, 3012, 6120, 8100 (D) 2021, 4050, 5112, 7100

Last Answer : Answer: C Explanation: The pages which are not in main memory are: 1020 will not cause page fault (1024-2047) 3012 will not cause page fault (3072-4095) 6120 will not cause page fault (4096-5119) 8100 will not cause page fault (6144-7167)

Which of the following is not a congestion policy at network layer? (A) Flow Control Policy (B) Packet Discard Policy (C) Packet Lifetime Management Policy (D) Routing Algorithm

Description : Which of the following is not a congestion policy at network layer? (A) Flow Control Policy (B) Packet Discard Policy (C) Packet Lifetime Management Policy (D) Routing Algorithm

Last Answer : (A) Flow Control Policy

If the asset acquired outside India by a non-resident is brought by him to India & used for business, then in that case what shall be the cost of addition? a) Value of the asset at the time of bringing the asset to India less depreciation b) Actual cost of asset less actual depreciation c) Actual cost of asset less notional depreciation d) Any of the above

Description : If the asset acquired outside India by a non-resident is brought by him to India & used for business, then in that case what shall be the cost of addition? a) Value of the asset at the ... of asset less actual depreciation c) Actual cost of asset less notional depreciation d) Any of the above

Last Answer : c) Actual cost of asset less notional depreciation

State true of false. i) With paging, each process is divided into relatively small, fixed-size pages. ii) Segmentation provides for the use of pieces of varying size. A) Partition management B) Memory management C) Disk management D) All of the above

Description : State true of false. i) With paging, each process is divided into relatively small, fixed-size pages. ii) Segmentation provides for the use of pieces of varying size. A) Partition management B) Memory management C) Disk management D) All of the above

Last Answer : B) Memory management

The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read

Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read

Last Answer : d. Address register and read

The virtual address generated by a CPU is 32 bits. The Translation Lookaside Buffer (TLB) can hold total 64 page table entries and a 4-way set associative (i.e. with 4- cache lines in the set). The page size is 4 KB. The minimum size of TLB tag is (A) 12 bits (B) 15 bits (C) 16 bits (D) 20 bits

Description : The virtual address generated by a CPU is 32 bits. The Translation Lookaside Buffer (TLB) can hold total 64 page table entries and a 4-way set associative (i.e. with 4- cache lines in the set). The page size is 4 KB. The minimum size of TLB tag is (A) 12 bits (B) 15 bits (C) 16 bits (D) 20 bits

Last Answer : (C) 16 bits Explanation: VirtualAddress = 32 bits PageSize = 4KB = 12 bits therefore : VPNTag = 20 bits, OffsetTag = 12 bits TLBEntryLength = VPNTag = 20 bits TotalTLBEntries = 64, 4-way implies ... therefore : TLBIndex = 4 bits TLBTag = TLBEntryLength - TLBIndex = 20 - 4 = 16 bits

Consider the following justifications for commonly using the two-level CPU scheduling : I. It is used when memory is too small to hold all the ready processes. II. Because its performance is same as that of the FIFO. III. Because it facilitates putting some set of processes into memory and a choice is made from that. IV. Because it does not allow to adjust the set of in-core processes. Which of the following is true ? (A) I, III and IV (B) I and II (C) III and IV (D) I and III

Description : Consider the following justifications for commonly using the two-level CPU scheduling : I. It is used when memory is too small to hold all the ready processes. II. Because its performance is same as that of the FIFO. III. Because it ... ? (A) I, III and IV (B) I and II (C) III and IV (D) I and III

Last Answer : (D) I and III

........... is a large kernel, including scheduling file system, networking, device drivers, memory management and more. A) Monolithic kernel B) Micro kernel C) Macro kernel D) Mini kernel

Description : ........... is a large kernel, including scheduling file system, networking, device drivers, memory management and more. A) Monolithic kernel B) Micro kernel C) Macro kernel D) Mini kernel

Last Answer : A) Monolithic kernel

Which of the following is not the function of Microkernel? A) File management B) Low-level memory management C) Inter-process communication D) I/O interrupts management

Description : Which of the following is not the function of Microkernel? A) File management B) Low-level memory management C) Inter-process communication D) I/O interrupts management

Last Answer : A) File management

........... is a large kernel containing virtually the complete operating system, including, scheduling, file system, device drivers and memory management. A) Multilithic kernel B) Monolithic kernel C) Micro kernel D) Macro kernel

Description : ........... is a large kernel containing virtually the complete operating system, including, scheduling, file system, device drivers and memory management. A) Multilithic kernel B) Monolithic kernel C) Micro kernel D) Macro kernel

Last Answer : B) Monolithic kernel

A virtual memory based memory management algorithm partially swaps out a process. This is an example of (A) short term scheduling (B) long term scheduling (C) medium term scheduling (D) mutual exclusion

Description : A virtual memory based memory management algorithm partially swaps out a process. This is an example of (A) short term scheduling (B) long term scheduling (C) medium term scheduling (D) mutual exclusion

Last Answer : (C) medium term scheduling

A part of Windows 2000 operating system that is not portable is (A) Device Management (B) Virtual Memory Management (C) Processor Management (D) User Interface

Description : A part of Windows 2000 operating system that is not portable is (A) Device Management (B) Virtual Memory Management (C) Processor Management (D) User Interface

Last Answer : (B) Virtual Memory Management

Function of memory management unit is : (A) Address translation (B) Memory allocation (C) Cache management (D) All of the above

Description : Function of memory management unit is : (A) Address translation (B) Memory allocation (C) Cache management (D) All of the above

Last Answer : Answer: A

In process scheduling, ………………… determines which ready process will be executed next by processor. A) long term scheduling B) medium term scheduling C) short term scheduling D) none of the above

Description : In process scheduling, ………………… determines which ready process will be executed next by processor. A) long term scheduling B) medium term scheduling C) short term scheduling D) none of the above

Last Answer : C) short term scheduling

In process scheduling, …………………… determines when new processes are admitted to the system. A) long term scheduling B) medium term scheduling C) short term scheduling D) none of the above

Description : In process scheduling, …………………… determines when new processes are admitted to the system. A) long term scheduling B) medium term scheduling C) short term scheduling D) none of the above

Last Answer : A) long term scheduling

Which layers of the OSI determines the interface often system with the user? A) Network B) Application C) Data link D) Session

Description : Which layers of the OSI determines the interface often system with the user? A) Network B) Application C) Data link D) Session

Last Answer : B) Application

_is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these

Description : _is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these

Last Answer : b. Fetch

. The performance of the data store can be enhanced by in-memory caching usingthe____________, which can also be used independently of the data store. a) Blobstore b) Data store c) URL fetch d) memcache

Description : . The performance of the data store can be enhanced by in-memory caching usingthe____________, which can also be used independently of the data store. a) Blobstore b) Data store c) URL fetch d) memcache

Last Answer : memcache

The performance of the data store can be enhanced by in-memory caching usingthe____________, which can also be used independently of the data store. a) Blobstore b) Data store c) URL fetch d) memcache

Description : The performance of the data store can be enhanced by in-memory caching usingthe____________, which can also be used independently of the data store. a) Blobstore b) Data store c) URL fetch d) memcache

Last Answer : memcache

The necessary steps carried out to perform the operation of accessing either memory or I/O Device, constitute a ___________________ a) fetch operation b) execute operation c) machine cycle

Description : The necessary steps carried out to perform the operation of accessing either memory or I/O Device, constitute a ___________________ a) fetch operation b) execute operation c) machine cycle

Last Answer : c) machine cycle

Which of the following is valuable in increasing a page rank?  A. Static content  B.Paying for placement  C.No contact information  D.The quantity of links from other highly ranked pages to your site

Description : Which of the following is valuable in increasing a page rank?  A. Static content  B.Paying for placement  C.No contact information  D.The quantity of links from other highly ranked pages to your site

Last Answer : D.The quantity of links from other highly ranked pages to your site

Let Pi and Pj be two processes, R be the set of variables read from memory, and W be the set of variables written to memory. For the concurrent execution of two processes Pi and Pj, which of the following conditions is not true? (A) R(Pi)∩W(Pj)=Φ (B) W(Pi)∩R(Pj)=Φ (C) R(Pi)∩R(Pj)=Φ (D) W(Pi)∩W(Pj)=Φ

Description : Let Pi and Pj be two processes, R be the set of variables read from memory, and W be the set of variables written to memory. For the concurrent execution of two processes Pi and Pj, which of the following conditions is not true? (A) R(Pi)∩W(Pj)=Φ (B) W(Pi)∩R(Pj)=Φ (C) R(Pi)∩R(Pj)=Φ (D) W(Pi)∩W(Pj)=Φ

Last Answer : (C) R(Pi)∩R(Pj)=Φ 

A 17-year-old patient involved in an automobile accident is paralyzed with multiple peripheral extremity injuries. Nutritional support is instituted with a transnasal feeding catheter. Which of the following statement(s) is/are true concerning the patient’s management? a. Feeding into the stomach results in stimulation of the biliary/pancreatic axis which is probably trophic for small bowel b. Gastric secretions will dilute the feedings increasing the risk of diarrhea c. The major risk in this patient is tracheobronchial aspiration d. Placement of the feeding catheter through the pylorus into the first portion of the duodenum reduces the risk of regurgitation and aspiration

Description : A 17-year-old patient involved in an automobile accident is paralyzed with multiple peripheral extremity injuries. Nutritional support is instituted with a transnasal feeding catheter. Which of the ... pylorus into the first portion of the duodenum reduces the risk of regurgitation and aspiration

Last Answer : Answer: a, c, d The use of transnasal feeding catheters for intragastric feeding or for duodenal intubation are popular adjuncts for providing nutritional support by the enteral route. The ... the fourth portion of the duodenum reduces the risk of regurgitation and aspiration of feeding formulas

A process that execute only in main memory is referred to as ……………… and that allocated in disk is referred to a ……………. A) virtual memory, true memory B) virtual memory, real memory C) real memory, virtual memory D) imaginary memory, real memory

Description : A process that execute only in main memory is referred to as ……………… and that allocated in disk is referred to a ……………. A) virtual memory, true memory B) virtual memory, real memory C) real memory, virtual memory D) imaginary memory, real memory

Last Answer : C) real memory, virtual memory

Which of the following information not included in memory table? A) The allocation of main memory to process. B) The allocation of secondary memory to process C) Any information needed to manage virtual memory D) Any information about the existence of file

Description : Which of the following information not included in memory table? A) The allocation of main memory to process. B) The allocation of secondary memory to process C) Any information needed to manage virtual memory D) Any information about the existence of file

Last Answer : D) Any information about the existence of file

.................. is a facility that allows programmers to address memory from a logical point of view, without regard to the main memory, physically available. A) Visual memory B) Real memory C) Virtual memory D) Secondary memory

Description : .................. is a facility that allows programmers to address memory from a logical point of view, without regard to the main memory, physically available. A) Visual memory B) Real memory C) Virtual memory D) Secondary memory

Last Answer : C) Virtual memory

In ............. generation of operating system, operating system designers develop the concept of multiprogramming in which several jobs are in main memory at once. A) First B) Second C) Third D) Fourth

Description : In ............. generation of operating system, operating system designers develop the concept of multiprogramming in which several jobs are in main memory at once. A) First B) Second C) Third D) Fourth

Last Answer : C) Third

Which of the following statements is not true about disk-arm scheduling algorithms ? (A) SSTF (shortest seek time first) algorithm increases performance of FCFS. (B) The number of requests for disk service are not influenced by file allocation method. (C) Caching the directories and index blocks in main memory can also help in reducing disk arm movements. (D) SCAN and C-SCAN algorithms are less likely to have a starvation problem.

Description : Which of the following statements is not true about disk-arm scheduling algorithms ? (A) SSTF (shortest seek time first) algorithm increases performance of FCFS. (B) The number of requests for disk ... arm movements. (D) SCAN and C-SCAN algorithms are less likely to have a starvation problem.

Last Answer : (B) The number of requests for disk service are not influenced by file allocation method.

The ............... transfers the executable image of a C++ program from hard disk to main memory. (A) Compiler (B) Linker (C) Debugger (D) Loader

Description : The ............... transfers the executable image of a C++ program from hard disk to main memory. (A) Compiler (B) Linker (C) Debugger (D) Loader

Last Answer : (D) Loader

In ............. method, the word is written to the block in both the cache and main memory, in parallel. (A) Write through (B) Write back (C) Write protected (D) Direct mapping

Description : In ............. method, the word is written to the block in both the cache and main memory, in parallel. (A) Write through (B) Write back (C) Write protected (D) Direct mapping

Last Answer : (A) Write through 

In a paging system, it takes 30 ns to search translation Look-aside Buffer (TLB) and 90 ns to access the main memory. If the TLB hit ratio is 70%, the effective memory access time is: (1) 48 ns (2) 147 ns (3) 120 ns (4) 84 ns

Description : In a paging system, it takes 30 ns to search translation Look-aside Buffer (TLB) and 90 ns to access the main memory. If the TLB hit ratio is 70%, the effective memory access time is: (1) 48 ns (2) 147 ns (3) 120 ns (4) 84 ns

Last Answer : Answer: 2