Acontrol memory is__ stored in some area of memory:

a. Control instraction
b. Memory instruction
c. Register instruction
d. None of these

1 Answer

Answer :

a. Control instraction

Related questions

Description : Which is the method by which instructions are selected for execution: a. Instruction selection b. — Selection control c. Instraction sequencing d. All of these

Last Answer : c. Instraction sequencing

Description : Decode is the step during which instruction is__ a. Initialized b. Incremented c. Decoded d. Bothb&c

Last Answer : c. Decoded

Description : Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer

Last Answer : Cc. Instruction register

Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read

Last Answer : d. Address register and read

Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next

Last Answer : c. Instruction register, incremented and next

Description : Which register holds the current instruction to be executed. a. Instruction register b. Program register 9 Control register a None of these

Last Answer : a. Instruction register

Description : Which is the input of control unit: a. Master clock signal b. Instruction register c. Flags d. Control signals from bus e. Allof these

Last Answer : e. Allof these

Description : Which register holds the next instruction to be executed:

Last Answer : c. Program control register

Description : Which are contains one or more register that may be referenced by machine instruction: a. Input b. Output c. CPU d. ALU

Last Answer : c. CPU

Description : In which addressing the operand is actually present in instruction: a. Immediate addressing b. Direct addressing 9 Register addressing a None of these

Last Answer : a. Immediate addressing

Description : Which microinstruction provide next instruction from control memory: a. Microinstruction execution b. Microinstruction Buffer c. Microinstruction decoder d. Microinstraction Sequencing

Last Answer : d. Microinstraction Sequencing

Description : Addresses in control memory is made by for each register group: a. Address select logic b. Data select logic c. Control select logic d. All of these

Last Answer : a. Address select logic

Description : There are how many register groups in control memory: a 3 b 5 c. 6 d 8

Last Answer : b 5

Description : In register stack a stack can be a finite number of a Control word b. Memory word c Transfer word d. — Allof these

Last Answer : b. Memory word

Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine

Last Answer : d. Executable, Stack and Subroutine

Description : Arithmetic operation are carried by such micro operation on stored numeric data available in a. Register b. Data c. Both d. None

Last Answer : a. Register

Description : The micro program is an written in microcode and stored in firmware which is also referred as___ | a. Interpreter and control memory b. Translator and control store c. Translator and control memory d. ‘Interpreter and Translator

Last Answer : a. Interpreter and control memory

Description : _is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these

Last Answer : b. Fetch

Description : sis given an instruction in machine language this instruction is fetched from the memory by the CPU to execute: a. ALU b. CPU c. MU d. All of these

Last Answer : b. CPU

Description : Which instruction are 32 bits long , with extra 16 bits. a. Memory reference instruction b. Memory reference format c. Both d. None of these

Last Answer : a. Memory reference instruction

Description : Which are instruction in which two machine cycle are required: a. Instruction cycle b. Memory reference instruction c. Both d. None of these

Last Answer : b. Memory reference instruction

Description : Which instruction are used in multithreaded parallel processor architecture. a. Memory reference instruction b. Memory reference format c. Both d. None of these

Last Answer : a. Memory reference instruction

Description : Which instruction are arranged as per the protocols of memory reference format of the input file in a simple ASCII sequence of integers between the range O to 99 separated by spaces without formatted text ... : a. Memory reference instruction b. Memory reference format c. Both d. None of these

Last Answer : a. Memory reference instruction

Description : Call instruction is written inthe ss program. a. Main b. Procedures c. Program d. Memory

Last Answer : a. Main

Description : Micro-orders generate the_ __ address of operand and execute instruction and prepare for fetching next instruction from the main memory: a. Physical b. Effective c. Logical d. all of above

Last Answer : b. Effective

Description : Copy of instruction in cache memory is known as: a Execution cache b. Data cache c. Instruction cache d. Allof these

Last Answer : c. Instruction cache

Description : Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU

Last Answer : b. Main memory

Description : The length of instruction set depends on: a. Data size b. Memory size c. Both d. None

Last Answer : b. Memory size

Description : MIMD stands for: a. Multiple input multiple data b. Memory input multiple data c. Multiple instruction multiple data d. Memory instruction multiple data

Last Answer : c. Multiple instruction multiple data

Description : Which types of jump keeps a 2_byte instruction that holds the range from- 128to127 bytes in the memory location: a. Far jump b. Near jump ce. Short jump d. __ Allof these

Last Answer : ce. Short jump

Description : The decoded instruction is stored in ______ (A) Register (B) Memory Address Register(MAR) (C) Instruction Register(IR) (D) None of the Above

Last Answer : (C) Instruction Register(IR)

Description : The source/destination of operands can be the_ or one of the general-purpose register: a. Memory b. One c. both d. None of these

Last Answer : a. Memory

Description : In which transfer the computer register are indicated in capital letters for depicting its function. a. Memory transfer b. Register transfer c. Bus transfer d. None of these

Last Answer : b. Register transfer

Description : The register that includes the address of the memory unit is termed asthe _ a. MAR b PC Cc. IR d. None of these

Last Answer : a. MAR

Description : In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these

Last Answer : ce. MAR

Description : Which operation puts memory address in memory address register and data in DR. a Memory read b. Memory write c Both d. None

Last Answer : b. Memory write

Description : Before checking the program for errors in translating code into machine language the high level language code is loaded into __ a. Register b. Memory c. Data d. CPU

Last Answer : b. Memory

Description : ___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory

Last Answer : b. Microprocessor

Description : A flag isa __ __that keep track of a changing condition during computer run: a. Memory b. Register c. Controller d. None of these

Last Answer : d. None of these

Description : The function of these microinstructions is to issue the micro orders to_ _ a. CPU b. Memory c. Register d. Accumulator

Last Answer : a. CPU

Description : Various machine level components are: a. Address register > Program counter c Data register d. Accumulator register e. Memory of 2K,16 bits/word RAM f. Multiplexers g. Allof these

Last Answer : g. Allof these

Description : In stack organization address register is known as the: a. Memory stack b. Stack pointer c. Push operation d. Pop operation

Last Answer : b. Stack pointer

Description : In which addressing the simplest addressing mode where an operand is fetched from memory is a. Immediate addressing b. Direct addressing c. Register addressing d. None of these

Last Answer : b. Direct addressing

Description : In which mode the main memory location holds the EA of the operand: a. Immediate addressing b. Direct addressing c. Register addressing d. Indirect addressing

Last Answer : d. Indirect addressing

Description : In post-indexing the contents of the address field are used to access a memory location containing a___ address: Immediate addressing Direct addressing Register addressing ao | None of these

Last Answer : Direct addressing

Description : Which types of register holds a single vector containing at least two read ports and one write ports: a. Data system b. Data base Cc. Memory d. Vector register

Last Answer : d. Vector register

Description : Parallel computing means doing several takes simultaneously thus improving the performance of the a. Data system b. Computer system Cc. Memory d. Vector register

Last Answer : b. Computer system

Description : Microcodes are stored as firmware in _ a. Memory chips b. Registers c. accumulators d. none of these

Last Answer : a. Memory chips

Description : The time required to complete one instruction is called. a. Fetch time b. Execution time c. Control time d. All of these

Last Answer : b. Execution time

Description : Which unit is necessary for the execution of instruction: a. Timing b. Control ce. Both d. None of these

Last Answer : ce. Both