Description : Which instruction are 32 bits long , with extra 16 bits. a. Memory reference instruction b. Memory reference format c. Both d. None of these
Last Answer : a. Memory reference instruction
Description : Which instruction are used in multithreaded parallel processor architecture. a. Memory reference instruction b. Memory reference format c. Both d. None of these
Description : Which instruction are arranged as per the protocols of memory reference format of the input file in a simple ASCII sequence of integers between the range O to 99 separated by spaces without formatted text ... : a. Memory reference instruction b. Memory reference format c. Both d. None of these
Description : sis given an instruction in machine language this instruction is fetched from the memory by the CPU to execute: a. ALU b. CPU c. MU d. All of these
Last Answer : b. CPU
Description : The length of instruction set depends on: a. Data size b. Memory size c. Both d. None
Last Answer : b. Memory size
Description : __is the sequence of operations performed by CPU in processing an instruction: a. Execute cycle b. Fetch cycle c. Decode d. Instruction cycle
Last Answer : d. Instruction cycle
Description : Which cycle refers to the time period during which one instruction is fetched and executed by the CPU: a. Fetch cycle b. Instruction cycle c. Decode cycle d. Execute cycle
Last Answer : b. Instruction cycle
Description : _is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these
Last Answer : b. Fetch
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next
Last Answer : c. Instruction register, incremented and next
Description : Call instruction is written inthe ss program. a. Main b. Procedures c. Program d. Memory
Last Answer : a. Main
Description : Micro-orders generate the_ __ address of operand and execute instruction and prepare for fetching next instruction from the main memory: a. Physical b. Effective c. Logical d. all of above
Last Answer : b. Effective
Description : Which microinstruction provide next instruction from control memory: a. Microinstruction execution b. Microinstruction Buffer c. Microinstruction decoder d. Microinstraction Sequencing
Last Answer : d. Microinstraction Sequencing
Description : Acontrol memory is__ stored in some area of memory: a. Control instraction b. Memory instruction c. Register instruction d. None of these
Last Answer : a. Control instraction
Description : Copy of instruction in cache memory is known as: a Execution cache b. Data cache c. Instruction cache d. Allof these
Last Answer : c. Instruction cache
Description : Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU
Last Answer : b. Main memory
Description : MIMD stands for: a. Multiple input multiple data b. Memory input multiple data c. Multiple instruction multiple data d. Memory instruction multiple data
Last Answer : c. Multiple instruction multiple data
Description : Which types of jump keeps a 2_byte instruction that holds the range from- 128to127 bytes in the memory location: a. Far jump b. Near jump ce. Short jump d. __ Allof these
Last Answer : ce. Short jump
Description : Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer
Last Answer : Cc. Instruction register
Description : Which are contains one or more register that may be referenced by machine instruction: a. Input b. Output c. CPU d. ALU
Last Answer : c. CPU
Description : The time required to complete one instruction is called. a. Fetch time b. Execution time c. Control time d. All of these
Last Answer : b. Execution time
Description : Which section is basically a sequence of instruction with a clear indication of beginning and end for updating shared variables. a. Racing section b. Critical section c. d. Both None of thes
Last Answer : . Critical sectio
Description : The simplest method of controlling sequence of instruction execution is to have each instruction explicitly specify: a. The address of next instruction to be run b. Address of previous instruction c. Both a &b d. None of these
Last Answer : a. The address of next instruction to be run
Description : is the step during which the operations specified by the instruction are executed: a. Execute b. Decode c. Both a& b d. None of these
Last Answer : a. Execute
Description : Execution of instruction specified by instruction to perform: a. Operation b. Operands c. Both a &b d. None of these
Last Answer : a. Operation
Description : Which unit is necessary for the execution of instruction: a. Timing b. Control ce. Both d. None of these
Last Answer : ce. Both
Description : is an external hardware event which causes the CPU to interrupt the current instruction sequence: a. Input interrupt b. Output interrupt c. Both d. None of these
Last Answer : c. Both
Description : Each instruction is also accompanied by a___ : a. Microprocessor b. Microcode c. Both d. None of these
Last Answer : b. Microcode
Description : In instruction formats instruction is represent by a___ _ of bits: a. Sequence b. Parallel c. Both d. None
Last Answer : a. Sequence
Description : In length instruction some programs wants a complex instruction set containing more instruction, more addressing modes and greater address rang, as in case of a. RISC b. CISC c. Both d. None
Last Answer : b. CISC
Description : In length instruction other programs on the other hand, want a small and fixed-size instruction set that contains only a limited number of opcodes, as in case of a. RISC b CISC c. Both d. None
Last Answer : a. RISC
Description : The instruction set can have variable-length instruction format primarily due to: a. Varying number of operands b. Varying length of opcodes in some CPU ce. Both d. None
Description : An instruction code must specify the address of the__. a. Opecode b. Operand c. Both d. None
Last Answer : b. Operand
Description : Arithmetic instruction are used to perform operation on: a. Numerical data b. Non-numerical data c. Both d. None
Last Answer : a. Numerical data
Description : In program control the instruction is set for the statement in a: a. Parallel b. Sequence c. Both d. None
Last Answer : b. Sequence
Description : Which processor has a single instruction multiple data stream organization that manipulates the common instruction by means of multiple functional units. a. Attached array processor b. SIMD array processor c. Both d. None
Last Answer : b. SIMD array processor
Description : Before checking the program for errors in translating code into machine language the high level language code is loaded into __ a. Register b. Memory c. Data d. CPU
Last Answer : b. Memory
Description : program converts machine instructions into control signals. a. Control memory program b. Control store program c Botha&b d. Only memory
Last Answer : c Botha&b
Description : Various machine level components are: a. Address register > Program counter c Data register d. Accumulator register e. Memory of 2K,16 bits/word RAM f. Multiplexers g. Allof these
Last Answer : g. Allof these
Description : Two important fields of an instruction are. a. Opcode b. Operand c. Only a d. Botha&b
Last Answer : d. Botha&b
Description : The complete set of op-codes for a particular microprocessor defines the_ set for that processor: a. Code b. Function c. Module d. Instruction
Last Answer : d. Instruction
Description : Which is the method by which instructions are selected for execution: a. Instruction selection b. — Selection control c. Instraction sequencing d. All of these
Last Answer : c. Instraction sequencing
Description : As the instruction length increases ————_ of instruction addresses in all the instruction is_ a. Implicit inclusion b. Implicit and disadvantageous c. Explicit and disadvantageous d. Explicit and disadvantageous
Last Answer : c. Explicit and disadvantageous
Description : Decode is the step during which instruction is__ a. Initialized b. Incremented c. Decoded d. Bothb&c
Last Answer : c. Decoded
Description : The contents of the program counter isthe __——__—oof the instruction to be run. a. Data b. Address c. Counter d. None of these
Last Answer : b. Address
Description : Which are designed to interpret a specified number of instruction code. a. Programmer b. Processors c. Instruction d. Opcode
Last Answer : b. Processors
Description : __is divided into a number of fields and is represented as a sequence of bits: a. instruction b. — instruction set c. instruction code d. parity code
Last Answer : a. instruction
Description : Which is the most important component of a digit computer that interprets the instruction and processes the data contained in computer programs: MU b. ALU c. CPU d. PC
Description : Which register holds the next instruction to be executed:
Last Answer : c. Program control register
Description : Which register holds the current instruction to be executed. a. Instruction register b. Program register 9 Control register a None of these
Last Answer : a. Instruction register