___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory

___uses the stack to store return address of subroutine:

a. CPU
b. Microprocessor
c. register
d. memory
by

1 Answer

Answer :

b. Microprocessor
by

Related questions

The extent nesting in subroutine is limited only by: a. Number of available Stack locations b. Number of available Addressing locations c. Number of available CPU locations d. Number of available Memory locations

Description : The extent nesting in subroutine is limited only by: a. Number of available Stack locations b. Number of available Addressing locations c. Number of available CPU locations d. Number of available Memory locations

Last Answer : a. Number of available Stack locations

A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored

Description : A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored

Last Answer : a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory.

When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non executable, pointer and subroutine b. Executable, Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine

Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine

Last Answer : d. Executable, Stack and Subroutine

In stack organization address register is known as the: a. Memory stack b. Stack pointer c. Push operation d. Pop operation

Description : In stack organization address register is known as the: a. Memory stack b. Stack pointer c. Push operation d. Pop operation

Last Answer : b. Stack pointer

It contains the stack for PC storage during subroutine calls and input/output interrupt services: a. Seven- level hardware b. Eight- level hardware

Description : It contains the stack for PC storage during subroutine calls and input/output interrupt services: a. Seven- level hardware b. Eight- level hardware

Last Answer : b. Eight- level hardware

Markers in subroutine cannot be accepted as limits whereas this markers stands for: a. Top of stack b. Bottom of stack c. Middle of stack d. Allof these

Description : Markers in subroutine cannot be accepted as limits whereas this markers stands for: a. Top of stack b. Bottom of stack c. Middle of stack d. Allof these

Last Answer : a. Top of stack

When a subroutine is the parameters are loaded onto the stack and SCAL is executed: a. Executed b. Invoked c. Ended d. = Started

Description : When a subroutine is the parameters are loaded onto the stack and SCAL is executed: a. Executed b. Invoked c. Ended d. = Started

Last Answer : b. Invoked

Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer

Description : Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer

Last Answer : Cc. Instruction register

The stack pointer is maintained in a : a. Data b. Register c. Address d. None of these

Description : The stack pointer is maintained in a : a. Data b. Register c. Address d. None of these

Last Answer : b. Register

A stack in a digital computer isa partofthe_ ALU CPU a. b. c. Memory unit d None of these

Description : A stack in a digital computer isa partofthe_ ALU CPU a. b. c. Memory unit d None of these

Last Answer : c. Memory unit

In register stack a stack can be a finite number of a Control word b. Memory word c Transfer word d. — Allof these

Description : In register stack a stack can be a finite number of a Control word b. Memory word c Transfer word d. — Allof these

Last Answer : b. Memory word

Return instruction is written in_ to written to main program: a. Subroutine b. Main program c. Botha &b d. None of these

Description : Return instruction is written in_ to written to main program: a. Subroutine b. Main program c. Botha &b d. None of these

Last Answer : a. Subroutine

Which is the common program control instructions are. a Branch b. Jump c Call a subroutine d. Return e. Allof these f None of these

Description : Which is the common program control instructions are. a Branch b. Jump c Call a subroutine d. Return e. Allof these f None of these

Last Answer : e. Allof these

Before checking the program for errors in translating code into machine language the high level language code is loaded into __ a. Register b. Memory c. Data d. CPU

Description : Before checking the program for errors in translating code into machine language the high level language code is loaded into __ a. Register b. Memory c. Data d. CPU

Last Answer : b. Memory

The function of these microinstructions is to issue the micro orders to_ _ a. CPU b. Memory c. Register d. Accumulator

Description : The function of these microinstructions is to issue the micro orders to_ _ a. CPU b. Memory c. Register d. Accumulator

Last Answer : a. CPU

___uses various symbols to represent function within program and is __ _representation: a. Flowchart, pictorial b. Algorithm, pictorial c. Pictorial, flowchart d. None of these

Description : ___uses various symbols to represent function within program and is __ _representation: a. Flowchart, pictorial b. Algorithm, pictorial c. Pictorial, flowchart d. None of these

Last Answer : a. Flowchart, pictorial

When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is transferred to the program counter c. two data bytes stored in the top two locations of the stack are transferred to the program counter d. two data bytes stored in the top two locations of the stack are transferred to the stack pointer

Description : When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is ... two data bytes stored in the top two locations of the stack are transferred to the stack pointer

Last Answer : c. two data bytes stored in the top two locations of the stack are transferred to the program counter

In memory transfer location address is supplied by that puts this on address bus. a. ALU b. CPU Cc. MAR d. MDR

Description : In memory transfer location address is supplied by that puts this on address bus. a. ALU b. CPU Cc. MAR d. MDR

Last Answer : b. CPU

Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU

Description : Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU

Last Answer : b. Main memory

The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read

Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read

Last Answer : d. Address register and read

The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, incremented and next b. Instruction register, incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next

Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next

Last Answer : c. Instruction register, incremented and next

The register that includes the address of the memory unit is termed asthe _ a. MAR b PC Cc. IR d. None of these

Description : The register that includes the address of the memory unit is termed asthe _ a. MAR b PC Cc. IR d. None of these

Last Answer : a. MAR

In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these

Description : In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these

Last Answer : ce. MAR

Which operation puts memory address in memory address register and data in DR. a Memory read b. Memory write c Both d. None

Description : Which operation puts memory address in memory address register and data in DR. a Memory read b. Memory write c Both d. None

Last Answer : b. Memory write

Addresses in control memory is made by for each register group: a. Address select logic b. Data select logic c. Control select logic d. All of these

Description : Addresses in control memory is made by for each register group: a. Address select logic b. Data select logic c. Control select logic d. All of these

Last Answer : a. Address select logic

Various machine level components are: a. Address register > Program counter c Data register d. Accumulator register e. Memory of 2K,16 bits/word RAM f. Multiplexers g. Allof these

Description : Various machine level components are: a. Address register > Program counter c Data register d. Accumulator register e. Memory of 2K,16 bits/word RAM f. Multiplexers g. Allof these

Last Answer : g. Allof these

In post-indexing the contents of the address field are used to access a memory location containing a___ address: Immediate addressing Direct addressing Register addressing ao | None of these

Description : In post-indexing the contents of the address field are used to access a memory location containing a___ address: Immediate addressing Direct addressing Register addressing ao | None of these

Last Answer : Direct addressing

By defining the _ __ register as last in first out stack the sequence can handle nested subroutines: a. S b. J ce. R d. T

Description : By defining the _ __ register as last in first out stack the sequence can handle nested subroutines: a. S b. J ce. R d. T

Last Answer : ce. R

In register stack a stack can be organized bya____——_—s number of register. a. Infinite number b. Finite number c. Both d. None

Description : In register stack a stack can be organized bya____——_—s number of register. a. Infinite number b. Finite number c. Both d. None

Last Answer : b. Finite number

In register stack items are removed from the stack by using the operation: a. Push b. Pop c. Both d. None

Description : In register stack items are removed from the stack by using the operation: a. Push b. Pop c. Both d. None

Last Answer : b. Pop

Which register holds the item that is to be written into the stack or read out of the stack: a. SR b. IR Cc. RR d DR

Description : Which register holds the item that is to be written into the stack or read out of the stack: a. SR b. IR Cc. RR d DR

Last Answer : d DR

In register stack the top item is read from the stack into: a. SR b. IR Cc. RR d. DR

Description : In register stack the top item is read from the stack into: a. SR b. IR Cc. RR d. DR

Last Answer : d. DR

The final addressing mode that we consider is a. Immediate addressing b. Direct addressing c. Register addressing d. Stack addressing

Description : The final addressing mode that we consider is a. Immediate addressing b. Direct addressing c. Register addressing d. Stack addressing

Last Answer : d. Stack addressing

The stack pointer in the 8085 microprocessor is a: a) 16 bit register that points to stack memory locations b) 16 bit accumulator c) Memory location in the stack d) None of The Above

Description : The stack pointer in the 8085 microprocessor is a: a) 16 bit register that points to stack memory locations b) 16 bit accumulator c) Memory location in the stack d) None of The Above

Last Answer : a) 16 bit register that points to stack memory locations

A stack is a. an 8-bit register in the microprocessor b. a 16-bit register in the microprocessor c. a set of memory locations in R/WM reserved for storing information temporarily during the execution of computer

Description : A stack is a. an 8-bit register in the microprocessor b. a 16-bit register in the microprocessor c. a set of memory locations in R/WM reserved for storing information temporarily during the execution of computer

Last Answer : c. a set of memory locations in R/WM reserved for storing information temporarily during the execution of computer

Abus organization for seven __ register: a. ALU b. RISC c. CPU d. MUX

Description : Abus organization for seven __ register: a. ALU b. RISC c. CPU d. MUX

Last Answer : c. CPU

five bits of OPR select one of the operation inthe __ in control register. a. CPU b. RISC ec ALU d. MUX

Description : five bits of OPR select one of the operation inthe __ in control register. a. CPU b. RISC ec ALU d. MUX

Last Answer : ec ALU

Which are contains one or more register that may be referenced by machine instruction: a. Input b. Output c. CPU d. ALU

Description : Which are contains one or more register that may be referenced by machine instruction: a. Input b. Output c. CPU d. ALU

Last Answer : c. CPU

is just like a circular array: a. Data b. Register c. ALU d. CPU

Description : is just like a circular array: a. Data b. Register c. ALU d. CPU

Last Answer : b. Register

A CPU handles interrupt by executing interrupt service subroutine................. (A) by checking interrupt register after execution of each instruction (B) by checking interrupt register at the end of the fetch cycle (C) whenever an interrupt is registered (D) by checking interrupt register at regular time interval

Description : A CPU handles interrupt by executing interrupt service subroutine................. (A) by checking interrupt register after execution of each instruction (B) by checking interrupt register ... cycle (C) whenever an interrupt is registered (D) by checking interrupt register at regular time interval

Last Answer : (A) by checking interrupt register after execution of each instruction

In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack

Description : In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack

Last Answer : b. after OP code in the instruction

When a subroutine is called, the address of the instruction following the CALL instructions stored in/on the a. stack pointer b. accumulator c. program counter d. stack

Description : When a subroutine is called, the address of the instruction following the CALL instructions stored in/on the a. stack pointer b. accumulator c. program counter d. stack

Last Answer : d. stack

A is written as separate unit, apart from main and called whenever necessary: a. Subroutine b. Code c. Block d. None of these

Description : A is written as separate unit, apart from main and called whenever necessary: a. Subroutine b. Code c. Block d. None of these

Last Answer : a. Subroutine

A subroutine called by another subroutine is called: a. Nested b. For loop c. Break d. Continue

Description : A subroutine called by another subroutine is called: a. Nested b. For loop c. Break d. Continue

Last Answer : a. Nested

subroutine declaration come after procedure announcement: a. Global b. Local c. Botha &b d. None of these

Description : subroutine declaration come after procedure announcement: a. Global b. Local c. Botha &b d. None of these

Last Answer : a. Global

subroutines are invoked by using their___ _ ina subroutine call statement and replacing formal parameters with__ __ parameters: a. Identifier and formal b. Identifier and actual c. Expression and arguments d. None of these

Description : subroutines are invoked by using their___ _ ina subroutine call statement and replacing formal parameters with__ __ parameters: a. Identifier and formal b. Identifier and actual c. Expression and arguments d. None of these

Last Answer : b. Identifier and actual

Callis_ subroutine call. a. Conditional b. Unconditi c. Botha &b d. None of these

Description : Callis_ subroutine call. a. Conditional b. Unconditi c. Botha &b d. None of these

Last Answer : b. Unconditi

Subroutine is called _ a. In Same program b. Inexternal program co Botha&b d. None of these

Description : Subroutine is called _ a. In Same program b. Inexternal program co Botha&b d. None of these

Last Answer : co Botha&b

If internal subroutine is called global data is used to pass values defining parameters between __ program and defined | a. Main and subroutine b. Local and subroutine c. Global and subroutine d. Global and main

Description : If internal subroutine is called global data is used to pass values defining parameters between __ program and defined | a. Main and subroutine b. Local and subroutine c. Global and subroutine d. Global and main

Last Answer : a. Main and subroutine

The _stack can be 4-word memory addressed by 2 bits from an up/down counter known as the stack pointer: a. FIFO b. PIPO c. SISO d. LIFO

Description : The _stack can be 4-word memory addressed by 2 bits from an up/down counter known as the stack pointer: a. FIFO b. PIPO c. SISO d. LIFO

Last Answer : d. LIFO