Description : In register transfer the processor register as. a MAR b PC c IR d RI
Last Answer : d RI
Description : In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these
Last Answer : ce. MAR
Description : In memory transfer location address is supplied by that puts this on address bus. a. ALU b. CPU Cc. MAR d. MDR
Last Answer : b. CPU
Description : Which register holds the item that is to be written into the stack or read out of the stack: a. SR b. IR Cc. RR d DR
Last Answer : d DR
Description : In register stack the top item is read from the stack into: a. SR b. IR Cc. RR d. DR
Last Answer : d. DR
Description : The decoded instruction is stored in ______ (A) Register (B) Memory Address Register(MAR) (C) Instruction Register(IR) (D) None of the Above
Last Answer : (C) Instruction Register(IR)
Description : Which registers can interact with secondary memory? (A) Register (B) Memory Address Register(MAR) (C) Instruction Register(IR) (D) None of the Above
Last Answer : (B) Memory Address Register(MAR)
Description : Register are assumed to use positive-edge-triggered _ a. Flip-flop b. Logics Cc. Circuit d. Operation
Last Answer : a. Flip-flop
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer
Last Answer : Cc. Instruction register
Description : Which types of register holds a single vector containing at least two read ports and one write ports: a. Data system b. Data base Cc. Memory d. Vector register
Last Answer : d. Vector register
Description : Parallel computing means doing several takes simultaneously thus improving the performance of the a. Data system b. Computer system Cc. Memory d. Vector register
Last Answer : b. Computer system
Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine
Last Answer : d. Executable, Stack and Subroutine
Description : In arithmetic operation numbers of register and the circuits for addition at a. ALU b. MAR c. Both d. None
Last Answer : a. ALU
Description : The variable of __ correspond to hardware register: a. RAM b. RIL c. ALU d. MAR
Last Answer : b. RIL
Description : Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU
Last Answer : b. Main memory
Description : The function of these microinstructions is to issue the micro orders to_ _ a. CPU b. Memory c. Register d. Accumulator
Last Answer : a. CPU
Description : In register transfer which system is a sequential logic system in which flip-flops and gates are constructed: a. Digital system b. Register Cc. Data d. None
Last Answer : a. Digital system
Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next
Last Answer : c. Instruction register, incremented and next
Description : Which operation puts memory address in memory address register and data in DR. a Memory read b. Memory write c Both d. None
Last Answer : b. Memory write
Description : ___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory
Last Answer : b. Microprocessor
Description : Addresses in control memory is made by for each register group: a. Address select logic b. Data select logic c. Control select logic d. All of these
Last Answer : a. Address select logic
Description : Various machine level components are: a. Address register > Program counter c Data register d. Accumulator register e. Memory of 2K,16 bits/word RAM f. Multiplexers g. Allof these
Last Answer : g. Allof these
Description : In stack organization address register is known as the: a. Memory stack b. Stack pointer c. Push operation d. Pop operation
Last Answer : b. Stack pointer
Description : In post-indexing the contents of the address field are used to access a memory location containing a___ address: Immediate addressing Direct addressing Register addressing ao | None of these
Last Answer : Direct addressing
Description : Outputs of instruction/data path in CU are. a. Reg R/W b. Load/Reg-Reg c. ALU function select d. Load control e. Read control f. IR Latch g. JUMP/Branch/Next PC h_ = All of these
Last Answer : h_ = All of these
Description : Ininstruction formats the information required by the _ for execution: a. ALU b. CPU Cc. RISC d. DATA
Description : The memory bus is also referred as _ a. Databus b. Address bus c. Memory bus d. — Allof these
Last Answer : a. Databus
Description : function select takes op code in IR translating to function of ALU and it may be compact binary code or one line per ALU: a ALU b CPU c. Memory d. Cache
Last Answer : a ALU
Description : What does MAR stand for? a) Main Address Register b) Memory Access Register c) Main Accessible Register d) Memory Address Register
Last Answer : Answer: d Explanation: MAR is a type of register which is responsible for the fetch operation. MAR is connected to the address bus and it specifies the address for the read and write operations
Description : Which register is connected to the memory by way of the address bus: a. MAR b. MDR c. SAM d. None of these
Last Answer : a. MAR
Description : MAR stands for: a. Memory address register b. Memory address recode c. Micro address register d. None of these
Last Answer : a. Memory address register
Description : Which language is termed as the symbolic depiction used for indicating the series: a. Random transfer language b. Register transfer language c. Arithmetic transfer language d. __ Allof these
Last Answer : b. Register transfer language
Description : emaphore provides mutual exclusion for accesses to the buffer pool and is initialized to the value: a. Mutex b. Mutual Cc. Memory d. __ Allof these
Last Answer : Mutex
Description : Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these
Last Answer : b. Cache memory
Description : NUMA stands for. a. Number Uniform memory access b. Not Uniform memory access Cc. Non Uniform memory access d. __ Allof these
Last Answer : a. Number Uniform memory access
Description : High level language C supports register transfer technique for _ application. a. Executing b. Compiling c. Both d. None
Last Answer : a. Executing
Description : By defining the _ __ register as last in first out stack the sequence can handle nested subroutines: a. S b. J ce. R d. T
Last Answer : ce. R
Description : In register stack a stack can be organized bya____——_—s number of register. a. Infinite number b. Finite number c. Both d. None
Last Answer : b. Finite number
Description : Which addressing offset can be the content of PC and also can be negative: a. Relative addressing b. Immediate addressing c. Direct addressing d. Register addressing
Last Answer : a. Relative addressing
Description : The stack pointer is maintained in a : a. Data b. Register c. Address d. None of these
Last Answer : b. Register
Description : Which control refers to the track of the address of instructions. a. Data control b. Register control c. Program control d. None of these
Last Answer : c. Program control
Description : The source/destination of operands can be the_ or one of the general-purpose register: a. Memory b. One c. both d. None of these
Last Answer : a. Memory
Description : In which transfer the computer register are indicated in capital letters for depicting its function. a. Memory transfer b. Register transfer c. Bus transfer d. None of these
Last Answer : b. Register transfer
Description : Before checking the program for errors in translating code into machine language the high level language code is loaded into __ a. Register b. Memory c. Data d. CPU
Last Answer : b. Memory
Description : A flag isa __ __that keep track of a changing condition during computer run: a. Memory b. Register c. Controller d. None of these
Last Answer : d. None of these
Description : Acontrol memory is__ stored in some area of memory: a. Control instraction b. Memory instruction c. Register instruction d. None of these
Last Answer : a. Control instraction
Description : There are how many register groups in control memory: a 3 b 5 c. 6 d 8
Last Answer : b 5
Description : In register stack a stack can be a finite number of a Control word b. Memory word c Transfer word d. — Allof these
Last Answer : b. Memory word
Description : In which addressing the simplest addressing mode where an operand is fetched from memory is a. Immediate addressing b. Direct addressing c. Register addressing d. None of these
Last Answer : b. Direct addressing