Question

Describe the working of an ADM transmitter with neat block diagram.

Answer 1

ADM transmitter Block diagram:-

OR

Working:- A DM system that adjusts its step size according to the information signal characteristics is called as Adaptive Delta Modulation (ADM). Here the step size is not constant. The block diagram for generation of ADM signal is shown in above Figure The step size δ is varied by controlling the variable-gain amplifier which is assumed to have a low gain when the control voltage is zero and a large gain when the control voltage increases. The gain-control circuit consists of an RC integrator and a square-law device. Pulse generator produces narrow pulses of fixed amplitude at a rate equal to the desired sampling rate. The modulator consists of hard limiter and a product device/multiplier. Whatever be the actual value of e(t) the hard limiter output will be +1 if e(t) is positive and -1 if e(t) is negative. So the polarity of po(t) depends on the sign of e(t). The subsystem within a dotted line box is for adaptation. When the input signal is constant or slowly varying, DM signal will be hunting and the modulator output will be a sequence of alternate polarity pulses, there will not be any charge on the capacitor and the voltage across it will be zero. So the gain control is voltage is almost zero and there will not be any change in the amplitude of the pulses at the output of the variable gain amplifier. As the gain of this amplifier is adjusted initially to be low when the gain control voltage level is zero we have thus ensured that the step size is small when x (t) is almost constant or changing very slowly and thus, granular noise is reduced as shown in above Figure Now if x (t) is steeply rising or falling for some time the consecutive pulses in the pulse train will either be all positive or all negative. So the capacitor will be charged irrespective of whether it is positively charged or negatively. Due to the squaring device (square law device), the amplifier gain will be increased no matter what the polarity of the capacitor voltage is. The net result is an increase in step size and a reduction in slope-overload distortion as shown in figure