An address consists of ____. (1) an offset (2) a base register (3) an index register (4) All of the above

1 Answer

Answer :

All of the above

Related questions

Description : The ............... addressing mode is similar to register indirect addressing mode, except that an offset is added to the contents of the register. The offset and register are specified in the instruction. (A) Base indexed (B) Base indexed plus displacement (C) Indexed (D) Displacement

Last Answer : (D) Displacement

Description : Content of the program counter is added to the address part of the instruction in order to obtain the effective address is called_______ A. relative address mode. B. index addressing mode. C. register mode. D. implied mode.

Last Answer : A. relative address mode.

Description : Which register keeps tracks of the instructions in the program stored in memory? A. Address Register B. Index Register C. Program Counter D. None of the Above

Last Answer : C. Program Counter

Description : The register which contains the data to be written into or readout of the addressed location is called: a) Index Register b) Memory Address Register c) Memory Data Register d) None of The Above

Last Answer : c) Memory Data Register

Description : The register which keeps track of the execution of a program and which contains the memory address of the instruction currently being executed is known as: a) Index Register b) Memory Address Register c) Program Counter d) None of The Above

Last Answer : c) Program Counter

Description : Which addressing offset can be the content of PC and also can be negative: a. Relative addressing b. Immediate addressing c. Direct addressing d. Register addressing

Last Answer : a. Relative addressing

Description : C. P. U. consists of (1) Arithmetic and Logical unit and Register (2) Arithmetic and Logical unit, Register and Control unit (3) System unit and Memory (4) Hard disk and Control unit

Last Answer : Arithmetic and Logical unit, Register and Control unit

Description : In the TCP/IP protocol suite, which one of the following is NOT part of the IP header? a. Fragment Offset b. Source IP address c. Destination IP address d. Destination port number

Last Answer : d. Destination port number

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? A) Memory address register B) Memory data register C) Instruction register D) Program counter

Last Answer : Answer : D

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? A) Memory address registers B) Memory data registers C) Instruction register D) Program counter

Last Answer : Answer : C

Description : The contents of information are stored in A) Memory data register B) Memory address register C) Memory arithmetic registers D) Memory access register

Last Answer : Answer : A

Description : Registers, which are partially visible to users and used to hold conditional, are known as A) PC B) Memory address registers C) General purpose register D) Flags

Last Answer : Answer : C

Description : What does MAR stand for? a) Main Address Register b) Memory Access Register c) Main Accessible Register d) Memory Address Register

Last Answer : Answer: d Explanation: MAR is a type of register which is responsible for the fetch operation. MAR is connected to the address bus and it specifies the address for the read and write operations

Description : The load instruction is mostly used to designate a transfer from memory to a processor register known as_________ A. Accumulator B. Instruction Register C. Program counter D. Memory address Register

Last Answer : A. Accumulator

Description : A basic instruction that can be interpreted by computer generally has ________ A. An operand and an address B. decoder and an accumulator C. Sequence register and decoder D. None of the Above

Last Answer : A. An operand and an address

Description : The register which holds the address of the location to or from which data are to be transferred is known as_______ A. Instruction Register B. Control register C. Memory Address Register D. None of the Above

Last Answer : C. Memory Address Register

Description : The decoded instruction is stored in ______ (A) Register (B) Memory Address Register(MAR) (C) Instruction Register(IR) (D) None of the Above

Last Answer : (C) Instruction Register(IR)

Description : Which registers can interact with secondary memory? (A) Register (B) Memory Address Register(MAR) (C) Instruction Register(IR) (D) None of the Above

Last Answer : (B) Memory Address Register(MAR)

Description : The contents of information are stored in _______: a) Memory Data Register b) Memory Address Register c) Memory Access Register d) Memory Arithmetic Register e) None of The Above

Last Answer : a) Memory Data Register

Description : MDR(Memory Data Register) holds the --- 1) Segment number 2) Address of a memory location 3) Number of transistors 4) none of these

Last Answer : 3) Number of transistors

Description : The contents of information are stored in --- 1) Memory data register 2) Memory address register 3) Memory access register 4) Memory arithmetic register

Last Answer : 1) Memory data register

Description : To ensure that supporting area of an offset footing of a boundary wall is fully compressive, the C.G. of load must act (A) At the centre of the base (B) Within the middle third of the base (C) Within the middle fifth of the base (D) Neither (a), (b) nor (c)

Last Answer : Answer: Option B

Description : Two versions of the internet protocol (IP) are in use such as IP version 4 and IP version 6 each version defines an IP address ____: a) Same b) Unique c) Different

Last Answer : c) Different

Description : Two versions of the internet protocol (IP) are in use such as IP version 4 and IP version 6 each version defines an IP address ____: a) Same b) Unique c) Different d) None of These

Last Answer : c) Different

Description : The addressing mode which makes use of in-direction pointers is ______ A. Offset addressing mode B. Relative addressing mode C. Indirect addressing mode D. None of the Above

Last Answer : C. Indirect addressing mode

Description : Which is the important part of a combinational logic block: a. Index register b. Barrel shifter c. Both a & b d. None of these

Last Answer : b. Barrel shifter

Description : IR stands for: a. Intel register b. In counter register c. Index register d. Instruction register

Last Answer : d. Instruction register

Description : The memorandum and statistical register (MS 14 a) are prepared by____ on the ____ and the statistical memorandum should be submitted to _____on the 10th of the each month counter signed by______ a) Postmaster, ... /Parcel PA, 1st of the each month, Head of the circle, postmaster d) None of these

Last Answer : d) None of these

Description : Bags should not be entered in the general stock book in the offices which have been authorised by the ____to maintain the special form of stock register of bags ____ a) Superintendent , SK 2 b) Superintendent, SK1 c) Head of the Circle, Form S.K.-1 (a) d) None of these

Last Answer : c) Head of the Circle, Form S.K.-1 (a)

Description : The ____ place the data from a register onto the data bus: a. CPU b. ALU c. Both A and B d. None of these

Last Answer : a. CPU

Description : The information is transferred from the_____ and ____ specified register: a. MDR b. CPU c. Both A and B

Last Answer : c. Both A and B

Description : 8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, register ... c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register

Last Answer : c) 232 byte, five 8bit, register to register

Description : 8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, ... c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register

Last Answer : d) 232 byte, six 8 bit, register to register

Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read

Last Answer : d. Address register and read

Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next

Last Answer : c. Instruction register, incremented and next

Description : Mark the correct options relating village postman register. a) Village postman register is Form 85 is kept by each postman b) Address of the all article a/w No is to be entered in the register c) The postage due on the unpaid article is to be entered in this register. d) All the above

Last Answer : d) All the above

Description : The register that includes the address of the memory unit is termed asthe _ a. MAR b PC Cc. IR d. None of these

Last Answer : a. MAR

Description : In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these

Last Answer : ce. MAR

Description : Which operation puts memory address in memory address register and data in DR. a Memory read b. Memory write c Both d. None

Last Answer : b. Memory write

Description : ___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory

Last Answer : b. Microprocessor

Description : Addresses in control memory is made by for each register group: a. Address select logic b. Data select logic c. Control select logic d. All of these

Last Answer : a. Address select logic

Description : Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer

Last Answer : Cc. Instruction register

Description : Various machine level components are: a. Address register > Program counter c Data register d. Accumulator register e. Memory of 2K,16 bits/word RAM f. Multiplexers g. Allof these

Last Answer : g. Allof these

Description : In stack organization address register is known as the: a. Memory stack b. Stack pointer c. Push operation d. Pop operation

Last Answer : b. Stack pointer

Description : The stack pointer is maintained in a : a. Data b. Register c. Address d. None of these

Last Answer : b. Register

Description : In post-indexing the contents of the address field are used to access a memory location containing a___ address: Immediate addressing Direct addressing Register addressing ao | None of these

Last Answer : Direct addressing

Description : Which control refers to the track of the address of instructions. a. Data control b. Register control c. Program control d. None of these

Last Answer : c. Program control

Description : A type of core store that has a lower access time than the devices used for working store in the same processor is known as a. Core memory b. Buffer c. Fast core d. Address register

Last Answer : Address register

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Last Answer : Program counter

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address registers b. Memory data registers c. Instruction register d. Program counter

Last Answer : Instruction register