Which of the following instruction perform jump indirect relative to DPTR a) JMP A+DPTR b) JMP DPTR c) JMP @A+DPTR d) SJMP A+DPTR

Which of the following instruction perform jump indirect relative to DPTR a) JMP A+DPTR b) JMP DPTR
c) JMP @A+DPTR
d) SJMP A+DPTR
by

1 Answer

Answer :

b) JMP DPTR
by

Related questions

Which of the following instruction is wrong a) INC DPTR b) MOV @DPTR, A c) MOV A, @A+DPTR d) DEC DPTR

Description : Which of the following instruction is wrong a) INC DPTR b) MOV @DPTR, A c) MOV A, @A+DPTR d) DEC DPTR

Last Answer : d) DEC DPTR

Which of the following instruction perform the move accumulator to external RAM of 16bit address? a) MOV @ DPTR, A b) MOVX @ Ri, A c) MOV A, @ Ri d) MOVX @ DPTR, A

Description : Which of the following instruction perform the move accumulator to external RAM of 16bit address? a) MOV @ DPTR, A b) MOVX @ Ri, A c) MOV A, @ Ri d) MOVX @ DPTR, A

Last Answer : c) MOV A, @ Ri

Explain the difference between a JMP instruction and CALL instruction.

Description : Explain the difference between a JMP instruction and CALL instruction.

Last Answer : A JMP instruction permanently changes the program counter. A CALL instruction leaves information on the stack so that the original program execution sequence can be resumed.

What instruction performs Compare immediate to indirect and jump if not equal. a) CJNE A, #data, rel b) CJNE Rn, #data, rel c) CJNE @ Ri, #data, rel d) CJNE A, data, rel

Description : What instruction performs Compare immediate to indirect and jump if not equal. a) CJNE A, #data, rel b) CJNE Rn, #data, rel c) CJNE @ Ri, #data, rel d) CJNE A, data, rel

Last Answer : b) CJNE Rn, #data, rel

Which of the following instruction perform as of indirect RAM to accumulator? a) MOV A, Rn b) MOV @Ri, A c) MOV A, @Ri d) MOV Rn, A

Description : Which of the following instruction perform as of indirect RAM to accumulator? a) MOV A, Rn b) MOV @Ri, A c) MOV A, @Ri d) MOV Rn, A

Last Answer : c) MOV A, @Ri

Memory access in RISC architecture is limited to instructions a. CALL and RET b. PUSH and POP c. STA and LDA d. MOV and JMP

Description : Memory access in RISC architecture is limited to instructions a. CALL and RET b. PUSH and POP c. STA and LDA d. MOV and JMP

Last Answer : c. STA and LDA

What is the control unit's function in the CPU? a. To transfer data to primary storage b. to store program instruction c. to perform logic operations d. to decode program instruction

Description : What is the control unit's function in the CPU? a. To transfer data to primary storage b. to store program instruction c. to perform logic operations d. to decode program instruction

Last Answer : b. to store program instruction

Which is not a typical program control instruction? (A) BR (B) JMP (C) SHL (D) TST

Description : Which is not a typical program control instruction? (A) BR (B) JMP (C) SHL (D) TST

Last Answer : (C) SHL

System calls are usually invoked by using: (A) A privileged instruction (B) An indirect jump (C) A software interrupt (D) Polling

Description : System calls are usually invoked by using: (A) A privileged instruction (B) An indirect jump (C) A software interrupt (D) Polling

Last Answer : (C) A software interrupt

The most common addressing techiniques employed by a CPU is a. immediate b. direct c. indirect d. register e. all of the above

Description : The most common addressing techiniques employed by a CPU is a. immediate b. direct c. indirect d. register e. all of the above

Last Answer : e. all of the above

How does the microprocessor differentiate between data and instruction

Description : How does the microprocessor differentiate between data and instruction

Last Answer : When the first m/c code of an instruction is fetched and decoded in the instruction register, the microprocessor recognizes the number of bytes required to fetch the entire ... will be considered as data & the byte after the data will be treated as the next instruction.

Why do we use XRA A instruction

Description : Why do we use XRA A instruction

Last Answer : The XRA A instruction is used to clear the contents of the Accumulator and store the value 00H.

Explain the different instruction formats with examples

Description : Explain the different instruction formats with examples

Last Answer : The instruction set is grouped into the following formats • One byte instruction MOV C,A • Two byte instruction MVI A,39H • Three byte instruction JMP 2345H

Mention the categories of instruction and give two examples for each category

Description : Mention the categories of instruction and give two examples for each category

Last Answer : The instructions of 8085 can be categorized into the following five • Data transfer MOV Rd,Rs STA 16-bit • Arithmetic ADD R DCR M • Logical XRI 8-bit RAR • Branching JNZ CALL 16-bit • Machine control HLT NOP

What is an instruction?

Description : What is an instruction?

Last Answer : An instruction is a binary pattern entered through an input device to command the microprocessor to perform that specific function

Define instruction cycle, machine cycle and T-state

Description : Define instruction cycle, machine cycle and T-state

Last Answer : Instruction cycle is defined, as the time required completing theexecution of an instruction. Machine cycle is defined as the time required completing one operation of accessing memory, I/O or ... request. Tcycle is defined as one subdivision of the operation performed in one clock period

How many operations are there in the instruction set of 8085 microprocessor?

Description : How many operations are there in the instruction set of 8085 microprocessor?

Last Answer : There are 74 operations in the 8085 microprocessor.

CISC stands for: a. Complex instruction set computer b. Camper instruct set of computer c. Compared instruction set computer d. None of these

Description : CISC stands for: a. Complex instruction set computer b. Camper instruct set of computer c. Compared instruction set computer d. None of these

Last Answer : a. Complex instruction set computer

RISC stands for: a. Reduced Instruction set computer b. Reduced Instruct set compare c. Reduced instruction stands computer d. All of these 107. DEC stands for:

Description : RISC stands for: a. Reduced Instruction set computer b. Reduced Instruct set compare c. Reduced instruction stands computer d. All of these 107. DEC stands for:

Last Answer : a. Reduced Instruction set computer

ISA stands for: a. Instruct set area b. Instruction set architecture c. Both a and b d. None of these

Description : ISA stands for: a. Instruct set area b. Instruction set architecture c. Both a and b d. None of these

Last Answer : b. Instruction set architecture

Which is not the main feature of DEC Alpha: a. 64 Bit RISC processor b. Designed to replace 32 VAX(CISC) c. Seven stage split integer/floating point pipeline d. Variable Instruction length

Description : Which is not the main feature of DEC Alpha: a. 64 Bit RISC processor b. Designed to replace 32 VAX(CISC) c. Seven stage split integer/floating point pipeline d. Variable Instruction length

Last Answer : d. Variable Instruction length

How many speed of 8088,8085,8086 microprocessor: a. 2.5 Million instruction per second b. 1.5 Million instruction per second c. 3.5 Million instruction per second d. 1.6 Million instruction per second

Description : How many speed of 8088,8085,8086 microprocessor: a. 2.5 Million instruction per second b. 1.5 Million instruction per second c. 3.5 Million instruction per second d. 1.6 Million instruction per second

Last Answer : a. 2.5 Million instruction per second

Which is most commonly measured in terms of MIPS previously million instruction per second: a. Microprocessor b. Performance of a microprocessor c. Assembly line d. None of thes

Description : Which is most commonly measured in terms of MIPS previously million instruction per second: a. Microprocessor b. Performance of a microprocessor c. Assembly line d. None of thes

Last Answer : b. Performance of a microprocessor

RISC stands for: a. Reduced Instruction Set Computer b. Reduced Intergraded Set Computer c. Resource Instruction Set Computer d. Resource Instruction System Computer

Description : RISC stands for: a. Reduced Instruction Set Computer b. Reduced Intergraded Set Computer c. Resource Instruction Set Computer d. Resource Instruction System Computer

Last Answer : a. Reduced Instruction Set Computer

CISC stands for: a. Complex Instruction System Computer b. Complex Instruction Set Car c. Complex Instruction Set Computer d. None of these

Description : CISC stands for: a. Complex Instruction System Computer b. Complex Instruction Set Car c. Complex Instruction Set Computer d. None of these

Last Answer : c. Complex Instruction Set Computer

When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is transferred to the program counter c. two data bytes stored in the top two locations of the stack are transferred to the program counter d. two data bytes stored in the top two locations of the stack are transferred to the stack pointer

Description : When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is ... two data bytes stored in the top two locations of the stack are transferred to the stack pointer

Last Answer : c. two data bytes stored in the top two locations of the stack are transferred to the program counter

In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack

Description : In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack

Last Answer : b. after OP code in the instruction

Interrupts which are initiated by an instruction are a. internal b. external c. hardware d. software r

Description : Interrupts which are initiated by an instruction are a. internal b. external c. hardware d. software

Last Answer : b. external

When a subroutine is called, the address of the instruction following the CALL instructions stored in/on the a. stack pointer b. accumulator c. program counter d. stack

Description : When a subroutine is called, the address of the instruction following the CALL instructions stored in/on the a. stack pointer b. accumulator c. program counter d. stack

Last Answer : d. stack

Pipeline implement a. fetch instruction b. decode instruction c. fetch operand d. calculate operand e. execute instruction f. all of abve

Description : Pipeline implement a. fetch instruction b. decode instruction c. fetch operand d. calculate operand e. execute instruction f. all of abve

Last Answer : f. all of abve

Interrupts which are initiated by an instruction are a. internal b. external c. hardware d. software

Description : Interrupts which are initiated by an instruction are a. internal b. external c. hardware d. software

Last Answer : d. software

Pipelining strategy is called implement a. instruction execution b. instruction prefetch c. instruction decoding d. instruction manipulation

Description : Pipelining strategy is called implement a. instruction execution b. instruction prefetch c. instruction decoding d. instruction manipulation

Last Answer : b. instruction prefetch

Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory Address Register b. Memory Data Register c. Instruction Register d. Program Register

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory Address Register b. Memory Data Register c. Instruction Register d. Program Register

Last Answer : d. Program Register

8253, 8257 c) 8257,8251 d)8251,825721.Consider the following set of 8085 instruction.MVI A,82HORA AJP DSPLYXRA ADSPLY:OUT PORT1HLT.The output at PORT1 isa) 00H b) FFH c) 92H d) 11H

Description : 8253, 8257 c) 8257,8251 d)8251,825721.Consider the following set of 8085 instruction.MVI A,82HORA AJP DSPLYXRA ADSPLY:OUT PORT1HLT.The output at PORT1 isa) 00H b) FFH c) 92H d) 11H

Last Answer : a) 00H

The contents of accumulator before CMA instruction is A5H. Its content after instructionexecution isa) A5H b) 5AH

Description : The contents of accumulator before CMA instruction is A5H. Its content after instructionexecution isa) A5H b) 5AH

Last Answer : b) 5AH

In an 8085 microprocessor, the instruction CMP B has been executed while the contentsof accumulator is less than that of register B. As a result carry flag and zero flag will berespectively (A) set, reset (B) reset, set (C) reset, reset (D) set, set

Description : In an 8085 microprocessor, the instruction CMP B has been executed while the contentsof accumulator is less than that of register B. As a result carry flag and zero flag will berespectively (A) set, reset (B) reset, set (C) reset, reset (D) set, set

Last Answer : (A) set, reset

Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Last Answer : d. Program counter

Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address register b. Memory data register c. Instruction registers d. Program counter

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address register b. Memory data register c. Instruction registers d. Program counter

Last Answer : c. Instruction registers

Any method for controlling access to or use of memory is known a. Memory map b. Memory protection c. Memory management d. Memory instruction

Description : Any method for controlling access to or use of memory is known a. Memory map b. Memory protection c. Memory management d. Memory instruction

Last Answer : b. Memory protection

a computer which CPU speed around 100 million instruction per second and with the word length of around 64 bits is known as a. Super computer b. Mini computer c. Micro computer d. Macro computer

Description : a computer which CPU speed around 100 million instruction per second and with the word length of around 64 bits is known as a. Super computer b. Mini computer c. Micro computer d. Macro computer

Last Answer : a. Super computer

Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Last Answer : d. Program counter

Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address registers b. Memory data registers c. Instruction register d. Program counter

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address registers b. Memory data registers c. Instruction register d. Program counter

Last Answer : c. Instruction register

Which statement is valid about interpreter? a. It translates one instruction at a time b. Object code is saved for future use c. Repeated interpretation is not necessary d. All of above

Description : Which statement is valid about interpreter? a. It translates one instruction at a time b. Object code is saved for future use c. Repeated interpretation is not necessary d. All of above

Last Answer : a. It translates one instruction at a time

A compiler is a translating program which a. Translates instruction of a high level language into machine language b. Translates entire source program into machine language program c. It is not involved in program’s execution d. All of above

Description : A compiler is a translating program which a. Translates instruction of a high level language into machine language b. Translates entire source program into machine language program c. It is not involved in program’s execution d. All of above

Last Answer : d. All of above

Instruction in computer languages consists of a. OPCODE b. OPERAND c. Both of above d. None of above

Description : Instruction in computer languages consists of a. OPCODE b. OPERAND c. Both of above d. None of above

Last Answer : c. Both of above

The subprogram finish the return instruction recovers the return address from the: a. Queue b. Stack c. Program counter d. Pointer

Description : The subprogram finish the return instruction recovers the return address from the: a. Queue b. Stack c. Program counter d. Pointer

Last Answer : b. Stack

In which register instruction is decoded prepared and ultimately executed: a. Instruction register b. Current register c. Both a and b d. None of these

Description : In which register instruction is decoded prepared and ultimately executed: a. Instruction register b. Current register c. Both a and b d. None of these

Last Answer : a. Instruction register

_______ Stores the instruction currently being executed: a. Instruction register b. Current register c. Both a and b d. None of these

Description : _______ Stores the instruction currently being executed: a. Instruction register b. Current register c. Both a and b d. None of these

Last Answer : a. Instruction register

Single address computer instruction has two parts: a. The operation code b. The operand c. A and B d. None of these

Description : Single address computer instruction has two parts: a. The operation code b. The operand c. A and B d. None of these

Last Answer : c. A and B

How many parts of single address computer instruction : a. 1 b. 2 c. 3 d. 4

Description : How many parts of single address computer instruction : a. 1 b. 2 c. 3 d. 4

Last Answer : b. 2