What instruction performs Compare immediate to indirect and jump if not equal. a) CJNE A, #data, rel
b) CJNE Rn, #data, rel
c) CJNE @ Ri, #data, rel d) CJNE A, data, rel

1 Answer

Answer :

b) CJNE Rn, #data, rel

Related questions

Description : Which of the following instruction is of logical instructions? i) CPL A ii) JC rel iii) DA A iv) ANL A, Rn v) RR A vi) CPL bit a) i, v b) v, iii, I c) iv, ii d) v, iii, ii

Last Answer : c) iv, i

Description : Which of the following instruction perform the move accumulator to external RAM of 16bit address? a) MOV @ DPTR, A b) MOVX @ Ri, A c) MOV A, @ Ri d) MOVX @ DPTR, A

Last Answer : c) MOV A, @ Ri

Description : Which of the following instruction perform as of indirect RAM to accumulator? a) MOV A, Rn b) MOV @Ri, A c) MOV A, @Ri d) MOV Rn, A

Last Answer : c) MOV A, @Ri

Description : Which of the following instruction perform jump indirect relative to DPTR a) JMP A+DPTR b) JMP DPTR c) JMP @A+DPTR d) SJMP A+DPTR

Last Answer : b) JMP DPTR

Description : The conditional branch instruction JNS performs the operations when if __ a) ZF =0 b) SF=0 c) PF=0 d) CF=0

Last Answer : b) SF=0

Description : The most common addressing techiniques employed by a CPU is a. immediate b. direct c. indirect d. register e. all of the above

Last Answer : e. all of the above

Description : Explain the following instructions. SWAP A ADD C MUL AB CJNE A, add, radd MOV A, R0 MOVX A, @ A + DPTR.

Last Answer : SWAP A Description: This instruction exchanges bits 0-3 of the Accumulator with bits 4-7 of the Accumulator. This instruction is identical to executing "RR A" or "RL A four times ... referred to as the base address and the accumulator value is referred to as the index address.

Description : In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack

Last Answer : b. after OP code in the instruction

Description : Serial port interrupt is generated, if ____ bits are seta) IE b) RI, IE c) IP, TI d) RI, TI

Last Answer : d) RI, TI

Description : Serial port vector address is of _______. And causes an interrupt when ________. a) 0013H, either TI or RI flag is set b) 0023H, either TI or RI flag is reset c) 0013H, either TI or RI flag is reset d) 0023H, either TI or RI flag is set

Last Answer : a) 0013H, either TI or RI flag is set

Description : Serial port interrupt is generated, if ____ bits are set a) IE b) RI, IE c) IP, TI d) RI, TI

Last Answer : a) IE

Description : Serial port interrupt is generated, if ____ bits are set a) IE b) RI, IE c) IP, TI d) RI, TI

Last Answer : d) RI, TI

Description : System calls are usually invoked by using: (A) A privileged instruction (B) An indirect jump (C) A software interrupt (D) Polling

Last Answer : (C) A software interrupt

Description : In which addressing mode the operand is given explicitly in the instruction? A. Absolute B. Immediate C. Indirect D. Direct

Last Answer : B. Immediate

Description : RISC stands for: a. Reduced Instruction set computer b. Reduced Instruct set compare c. Reduced instruction stands computer d. All of these 107. DEC stands for:

Last Answer : a. Reduced Instruction set computer

Description : Which of the following is of compare instruction in 8087? a) FTST b) FPREM c) FPATAN d) FLDI

Last Answer : a) FTST

Description : How does the microprocessor differentiate between data and instruction

Last Answer : When the first m/c code of an instruction is fetched and decoded in the instruction register, the microprocessor recognizes the number of bytes required to fetch the entire ... will be considered as data & the byte after the data will be treated as the next instruction.

Description : When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is ... two data bytes stored in the top two locations of the stack are transferred to the stack pointer

Last Answer : c. two data bytes stored in the top two locations of the stack are transferred to the program counter

Description : What is the control unit's function in the CPU? a. To transfer data to primary storage b. to store program instruction c. to perform logic operations d. to decode program instruction

Last Answer : b. to store program instruction

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory Address Register b. Memory Data Register c. Instruction Register d. Program Register

Last Answer : d. Program Register

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Last Answer : d. Program counter

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address register b. Memory data register c. Instruction registers d. Program counter

Last Answer : c. Instruction registers

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Last Answer : d. Program counter

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address registers b. Memory data registers c. Instruction register d. Program counter

Last Answer : c. Instruction register

Description : In 8085, which of the following performs: load register pair immediate operation? (1) LDAX rp (2) LHLD addr (3) LXI rp, data (4) INX rp

Last Answer : Answer: 3

Description : The two basic types of record-access methods are a. Sequential and random b. Sequential and indexed c. Direct and immediate d. On-line and real time

Last Answer : a. Sequential and random

Description : Where does a computer add and compare data? a. Hard disk b. Floppy disk c. CPU chip d. Memory chip

Last Answer : c. CPU chip

Description : Outputs of instruction/data path in CU are. a. Reg R/W b. Load/Reg-Reg c. ALU function select d. Load control e. Read control f. IR Latch g. JUMP/Branch/Next PC h_ = All of these

Last Answer : h_ = All of these

Description : Why do we use XRA A instruction

Last Answer : The XRA A instruction is used to clear the contents of the Accumulator and store the value 00H.

Description : Explain the different instruction formats with examples

Last Answer : The instruction set is grouped into the following formats • One byte instruction MOV C,A • Two byte instruction MVI A,39H • Three byte instruction JMP 2345H

Description : Mention the categories of instruction and give two examples for each category

Last Answer : The instructions of 8085 can be categorized into the following five • Data transfer MOV Rd,Rs STA 16-bit • Arithmetic ADD R DCR M • Logical XRI 8-bit RAR • Branching JNZ CALL 16-bit • Machine control HLT NOP

Description : What is an instruction?

Last Answer : An instruction is a binary pattern entered through an input device to command the microprocessor to perform that specific function

Description : Define instruction cycle, machine cycle and T-state

Last Answer : Instruction cycle is defined, as the time required completing theexecution of an instruction. Machine cycle is defined as the time required completing one operation of accessing memory, I/O or ... request. Tcycle is defined as one subdivision of the operation performed in one clock period

Description : Explain the difference between a JMP instruction and CALL instruction.

Last Answer : A JMP instruction permanently changes the program counter. A CALL instruction leaves information on the stack so that the original program execution sequence can be resumed.

Description : How many operations are there in the instruction set of 8085 microprocessor?

Last Answer : There are 74 operations in the 8085 microprocessor.

Description : CISC stands for: a. Complex instruction set computer b. Camper instruct set of computer c. Compared instruction set computer d. None of these

Last Answer : a. Complex instruction set computer

Description : ISA stands for: a. Instruct set area b. Instruction set architecture c. Both a and b d. None of these

Last Answer : b. Instruction set architecture

Description : Which is not the main feature of DEC Alpha: a. 64 Bit RISC processor b. Designed to replace 32 VAX(CISC) c. Seven stage split integer/floating point pipeline d. Variable Instruction length

Last Answer : d. Variable Instruction length

Description : How many speed of 8088,8085,8086 microprocessor: a. 2.5 Million instruction per second b. 1.5 Million instruction per second c. 3.5 Million instruction per second d. 1.6 Million instruction per second

Last Answer : a. 2.5 Million instruction per second

Description : Which is most commonly measured in terms of MIPS previously million instruction per second: a. Microprocessor b. Performance of a microprocessor c. Assembly line d. None of thes

Last Answer : b. Performance of a microprocessor

Description : RISC stands for: a. Reduced Instruction Set Computer b. Reduced Intergraded Set Computer c. Resource Instruction Set Computer d. Resource Instruction System Computer

Last Answer : a. Reduced Instruction Set Computer

Description : CISC stands for: a. Complex Instruction System Computer b. Complex Instruction Set Car c. Complex Instruction Set Computer d. None of these

Last Answer : c. Complex Instruction Set Computer

Description : Interrupts which are initiated by an instruction are a. internal b. external c. hardware d. software

Last Answer : b. external

Description : When a subroutine is called, the address of the instruction following the CALL instructions stored in/on the a. stack pointer b. accumulator c. program counter d. stack

Last Answer : d. stack

Description : Pipeline implement a. fetch instruction b. decode instruction c. fetch operand d. calculate operand e. execute instruction f. all of abve

Last Answer : f. all of abve

Description : Interrupts which are initiated by an instruction are a. internal b. external c. hardware d. software

Last Answer : d. software

Description : Pipelining strategy is called implement a. instruction execution b. instruction prefetch c. instruction decoding d. instruction manipulation

Last Answer : b. instruction prefetch

Description : 8253, 8257 c) 8257,8251 d)8251,825721.Consider the following set of 8085 instruction.MVI A,82HORA AJP DSPLYXRA ADSPLY:OUT PORT1HLT.The output at PORT1 isa) 00H b) FFH c) 92H d) 11H

Last Answer : a) 00H

Description : The contents of accumulator before CMA instruction is A5H. Its content after instructionexecution isa) A5H b) 5AH

Last Answer : b) 5AH

Description : In an 8085 microprocessor, the instruction CMP B has been executed while the contentsof accumulator is less than that of register B. As a result carry flag and zero flag will berespectively (A) set, reset (B) reset, set (C) reset, reset (D) set, set

Last Answer : (A) set, reset