Description : Explain LDA, STA and DAA instructions
Last Answer : LDA copies the data byte into accumulator from the memory location specified by the 16-bit address. STA copies the data byte from theaccumulator in the memory location specified by 16-bit address. DAA changes the contents of the accumulator from binary to 4-bit BCD digits.
Description : Which is not the main architectural feature of Power PC: a. It is not based on RISC b. Superscalar implementation c. Both 32 & 64 Bit d. Paged Memory management architecture
Last Answer : a. It is not based on RISC
Description : When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is ... two data bytes stored in the top two locations of the stack are transferred to the stack pointer
Last Answer : c. two data bytes stored in the top two locations of the stack are transferred to the program counter
Description : Explain the difference between a JMP instruction and CALL instruction.
Last Answer : A JMP instruction permanently changes the program counter. A CALL instruction leaves information on the stack so that the original program execution sequence can be resumed.
Description : Which is the architecture of microprocessor: a. CISC b. RISC c. All of these d. None of these
Last Answer : c. All of these
Description : Decoding of an instruction in RISC architecture means decision on working of control unit for: a. Remainder of instructions b. _ Divisor of instructions c. Dividend of instructions d. None of these
Last Answer : a. Remainder
Description : The instructions for starting the computer are house on a. Random access memory b. CD-Rom c. Read only memory chip
Last Answer : c. Read only memory chip
Description : Which of the following instruction perform jump indirect relative to DPTR a) JMP A+DPTR b) JMP DPTR c) JMP @A+DPTR d) SJMP A+DPTR
Last Answer : b) JMP DPTR
Description : SP stand for: a. Stack pointer b. Stack pop c. Stack push d. None of these
Last Answer : a. Stack pointer
Description : Which is the basic stack operation: a. PUSH b. POP c. BOTH A and B d. None of these
Last Answer : c. BOTH A and B
Description : Which is a type of microprocessor that is designed with limited number of instructions: a. CISC b. RISC ce. Both d. None
Last Answer : ce. Both
Description : Then number of T-states of the instruction STA in 8085 microprocessor is A) 10 B) 12 C) 13 D) 16
Last Answer : Then number of T-states of the instruction STA in 8085 microprocessor is 13
Description : In RISC architecture access to registers is made as a block and register file in a particular register can be selected by using: a. Multiplexer b. Decoder c. Subtractor d. Adder
Last Answer : b. Decoder
Description : Which of the following instruction is used to set bit port directly? a) SET P1.0 b) MOV P1.0, bit c) SETB P1.0 d) JB P1.0, bit
Last Answer : JB P1.0, bit
Description : Which of the following instruction is wrong a) INC DPTR b) MOV @DPTR, A c) MOV A, @A+DPTR d) DEC DPTR
Last Answer : d) DEC DPTR
Description : Which of the following instruction perform the move accumulator to external RAM of 16bit address? a) MOV @ DPTR, A b) MOVX @ Ri, A c) MOV A, @ Ri d) MOVX @ DPTR, A
Last Answer : c) MOV A, @ Ri
Description : Which of the following instruction perform as of indirect RAM to accumulator? a) MOV A, Rn b) MOV @Ri, A c) MOV A, @Ri d) MOV Rn, A
Last Answer : c) MOV A, @Ri
Description : Which are the architectural paradigms in microprocessor: a. RISC b. CISC c. PISC d. A and B
Last Answer : d. A and B
Description : RISC stands for: a. Reduced Instruction set computer b. Reduced Instruct set compare c. Reduced instruction stands computer d. All of these 107. DEC stands for:
Last Answer : a. Reduced Instruction set computer
Description : Which is not the main feature of DEC Alpha: a. 64 Bit RISC processor b. Designed to replace 32 VAX(CISC) c. Seven stage split integer/floating point pipeline d. Variable Instruction length
Last Answer : d. Variable Instruction length
Description : Motorola introduced 32 bit RISC processor called______: a. MC 88100 b. MC 81100 c. MC 80100 d. MC 81000
Last Answer : a. MC 88100
Description : Motorola introduced _____ processor: a. 2 bit-RISC b. 4 bit-RISC c. 8 bit-RISC d. 32 bit-RISC
Last Answer : d. 32 bit-RISC
Description : RISC stands for: a. Reduced Instruction Set Computer b. Reduced Intergraded Set Computer c. Resource Instruction Set Computer d. Resource Instruction System Computer
Last Answer : a. Reduced Instruction Set Computer
Description : Which of the following processors use RISC technology? a. 486dx b. Power PC c. 486sx d. 6340
Last Answer : b. Power PC
Description : Instructions and memory address are represented by a. Character code b. Binary codes c. Binary word d. Parity bit
Last Answer : b. Binary codes
Description : The process of starting a or restarting a computer system by loading instructions from a secondary storage device into the computer memory is called a. Duping b. Booting c. Padding d. CPS
Last Answer : b. Booting
Description : A microprocessor retries instructions from : a. Control memory b. Cache memory c. Main memory d. Virtual memory
Last Answer : c. Main memory
Description : The advantage of memory mapped I/O over I/O mapped I/O is, a) Faster b) Many instructions supporting memory mapped I/O c) Require a bigger address decoder d) All the above
Last Answer : d) All the above
Description : When a subroutine is called, the address of the instruction following the CALL instructions stored in/on the a. stack pointer b. accumulator c. program counter d. stack
Last Answer : d. stack
Description : According to the PMBOK guide which of the following statements is right in terms of using reserve analysis to determine a project budget ? a. Reserve analysis always plans contingency reserves ... not practical. e. Contingency reserves have never been a concern when planning a project budget.
Last Answer : . Reserve analysis always plans contingency reserves for unexpected project scope and project costs, which are part of your project budget.
Description : Ingiven lines of code MOV AX,BL have different type of operands according to assembler for 8086 architecture these identifiers must be of. a. Different type only in byte b. Same type either in word or byte c. Botha &b d. None of these
Last Answer : b. Same type either in word or byte
Description : In stack organization address register is known as the: a. Memory stack b. Stack pointer c. Push operation d. Pop operation
Last Answer : b. Stack pointer
Description : What will be the hexadecimal value in the register ax (32-bit) after executing the following instructions? Mov al, 15 Mov ah, 15 Xor al, al Mov cl, 3 Shr ax, cl Codes: (A) 0F00 h (B) 0F0F h (C) 01E0 h (D) FFFF h
Last Answer : (C) 01E0 h
Description : Explain the following instructions. SWAP A ADD C MUL AB CJNE A, add, radd MOV A, R0 MOVX A, @ A + DPTR.
Last Answer : SWAP A Description: This instruction exchanges bits 0-3 of the Accumulator with bits 4-7 of the Accumulator. This instruction is identical to executing "RR A" or "RL A four times ... referred to as the base address and the accumulator value is referred to as the index address.
Description : Identify direct addressing instructions from following instructions : (i) MOV RO, R5 (ii) MOV RO, 80 H (iii) MOV RO, #75H (iv) ADD A, 45 H
Last Answer : Instructions ii) and iv) are direct addressing as 80H and 45H are direct addresses
Description : A 32-bit address bus allows access to a memory of capacity(a) 64 Mb (b) 16 Mb (c) 1Gb (d) 4 Gb 2.Which processor structure is pipelined? a) all x80 processors b) all x85 processors c) all x86 processors
Last Answer : c) all x86 processors
Description : A type of core store that has a lower access time than the devices used for working store in the same processor is known as a. Core memory b. Buffer c. Fast core d. Address register
Last Answer : d. Address register
Description : Any method for controlling access to or use of memory is known a. Memory map b. Memory protection c. Memory management d. Memory instruction
Last Answer : b. Memory protection
Description : Which of the following memories has the shortest access times? a. Cache memory b. Magnetic bubble memory c. Magnetic core memory d. RAM
Last Answer : a. Cache memory
Description : Which of the following is a way to access secondary memory? a. Random access memory b. Action method c. Transfer method d. Density method
Last Answer : a. Random access memory
Description : The magnetic storage chip used to provide non-volatile direct access storage of data and that have no moving parts are known as a. Magnetic core memory b. Magnetic tape memory c. Magnetic disk memory d. Magnetic bubble memory
Last Answer : a. Magnetic core memory
Description : DMA stands for: a. Dynamic memory access b. Data memory access c. Direct memory access d. Both B and C
Last Answer : d. Both B and C
Description : DMA stands for: a. Direct memory access b. Direct memory allocation c. Data memory access d. Data memory allocation
Last Answer : a. Direct memory access
Description : What type of architecture is used in 8085 microprocessor?
Last Answer : Ans- INTEL 8085 is a 8-bit microprocessor. It's based on Von-Neumann architecture in which the data and instructions are in the same memory space without any distinction between them. Data line: 8-bits--Can ... of data at a time. Address line: 16-bits--Can address upto 2^16(64KB) of address space.
Description : PC’s use____ based on this architecture: a. CPU b. ALU c. MU
Last Answer : a. CPU
Description : ISA stands for: a. Instruct set area b. Instruction set architecture c. Both a and b d. None of these
Last Answer : b. Instruction set architecture
Description : Power PC microprocessor architecture is developed by: a. Apple b. IBM c. Motorola d. All of these
Last Answer : d. All of these
Description : SAM stands for: a. Simple architecture machine b. Solved architecture machine c. Both a & b d. None of these
Last Answer : a. Simple architecture machine
Description : The external system bus architecture is created using from ______ architecture: a. Pascal b. Dennis Ritchie c. Charles Babbage d. Von Neumann
Last Answer : d. Von Neumann
Description : 8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, register ... c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register
Last Answer : c) 232 byte, five 8bit, register to register