Description : Which of the following in 8085 microprocessor performs HL = HL + DE ? (A) DAD D (B) DAD H (C) DAD B (D) DAD SP
Last Answer : (A) DAD D
Description : The contents of Register (BL) and Register (AL) of 8085 microprocessor are 49H and 3AH respectively. The contents of AL, the status of carry flag (CF) and sign flag (SF) after executing 'SUB AL, BL' assembly language instruction, are ( ... ; CF=0; SF=0 (3) AL=F1H; CF=1; SF=1 (4) AL=1FH; CF=1; SF=1
Last Answer : Answer: 3
Description : Which are the operation that a computer performs on data that put in register: a. Register transfer b. Arithmetic c. Logical d. Allof these
Last Answer : d. Allof these
Description : Which one of the following is not an addressing mode? (A) Register indirect (B) Auto increment (C) Relative indexed (D) Immediate operand
Last Answer : (C) Relative indexed
Description : What instruction performs Compare immediate to indirect and jump if not equal. a) CJNE A, #data, rel b) CJNE Rn, #data, rel c) CJNE @ Ri, #data, rel d) CJNE A, data, rel
Last Answer : b) CJNE Rn, #data, rel
Description : We addr redundant bits toeach block to make thelength n = k + r. The resultingn-bit blocksare called _________. A) datawords B) blockwords C) codewords D) none of the above
Last Answer : codewords
Description : The RST 7 instruction in 8085 microprocessor is equivalent to: (A) CALL 0010 H (B) CALL 0034 H (C) CALL 0038 H (D) CALL 003C H
Last Answer : (C) CALL 0038 H
Description : Which of the following 8085 microprocessor hardware interrupt has the lowest priority? (A) RST 6.5 (B) RST 7.5 (C) TRAP (D) INTR
Last Answer : Answer: D
Description : 8085 microprocessor has ............. hardware interrupts. (A) 2 (B) 3 (C) 4 (D) 5
Last Answer : (D) 5
Description : The content of the accumulator after the execution of the following 8085 assembly language program, is: MVI A, 42H MVI B, 05H UGC: ADD B DCR B JNZ UGC ADI 25H HLT (A) 82 H (B) 78 H (C) 76 H (D) 47 H
Last Answer : (C) 76 H
Description : The content of the accumulator after the execution of the following 8085 assembly language program, is MVI A, 35H MOV B, A STC CMC RAR XRA B (A) 00H (B) 35H (C) EFH (D) 2FH
Last Answer : (D) 2FH
Description : In 8085 microprocessor, the digit 5 indicates that the microprocessor needs (1) -5 volts, +5 volts supply (2) +5 volts supply only (3) -5 volts supply only (4) 5 MHz clock
Last Answer : Answer: 2
Description : Find out the OSI layer, which performs token management. A) Network Layer B) Transport Layer C) Session Layer D) Presentation Layer
Last Answer : C) Session Layer
Description : Which one from the following is false ? (A) LALR parser is Bottom - Up parser (B) A parsing algorithm which performs a left to right scanning and a right most deviation is RL (1). (C) LR parser is Bottom - Up parser. (D) In LL(1), the 1 indicates that there is a one - symbol look - ahead.
Last Answer : (B) A parsing algorithm which performs a left to right scanning and a right most deviation is RL (1).
Description : The translator which performs macro calls expansion is called : (A) Macro processor (B) Micro pre-processor (C) Macro pre-processor (D) Dynamic linker
Last Answer : (C) Macro pre-processor
Description : The extent to which a software performs its intended functions without failures, is termed as (A) Robustness (B) Correctness (C) Reliability (D) Accuracy
Last Answer : (C) Reliability
Description : What is a rectangle 24 inx 35 in?
Last Answer : It is a 2-dimensional shape bounded by four straight sides,which meet at right angles.
Description : Which are the operation of versatility: a. exchange of information with the outside world via I/O device b. Transfer of data internally with in the central processing unit c. Performs of the basic arithmetic operations d. = Allof these
Last Answer : d. = Allof these
Description : List the allowed register pairs of 8085.
Last Answer : • B-C register pair • D-E register pair • H-L register pair
Description : The stack pointer in the 8085 microprocessor is a: a) 16 bit register that points to stack memory locations b) 16 bit accumulator c) Memory location in the stack d) None of The Above
Last Answer : a) 16 bit register that points to stack memory locations
Description : In an 8085 microprocessor, the instruction CMP B has been executed while the contentsof accumulator is less than that of register B. As a result carry flag and zero flag will berespectively (A) set, reset (B) reset, set (C) reset, reset (D) set, set
Last Answer : (A) set, reset
Description : Describe Briefly The Accumulator Register Of 8085.?
Last Answer : Answer :It is one of the most important 8 bit register of 8085 It is responsible for coordinating input and output to and from the microprocessor through it. The primary purpose of ... logical operations. This accumulator register is mainly used for arithmetic, logical, store and rotate operations.
Description : Explain Briefly The Flag Register In The 8085 Microprocessor.?
Last Answer : Answer :The flag register in 8085 is an 8-bit register which contains 5 bit positions. These five flags are of 1bit F/F and are known as zero, sign, carry, parity and auxiliary carry. ... addition and subtraction operations. The parity flag is used for results containing an even number of one's.
Description : In 8085 Which Is Called As High Order / Low Order Register?
Last Answer : Answer :Flag is called as Low order register & Accumulator is called as High order Register.
Description : What is the size of SP register in 8085 microprocessor? A) 16 bits B) 8 bits C) 64 bits D) 48 bits
Last Answer : What is the size of SP register in 8085 microprocessor? A) 16 bits B) 8 bits C) 64 bits D) 48 bits
Description : ___in all digital systems actually performs addition that can handle only two number at a time: a Register b. circuit c digital d. — Allof these
Last Answer : b. circuit
Description : By using ................... you can force immediate termination of a loop, by passing the conditional expression and any remaining code in the body of the loop. A) Break B) Continue C) Terminate D) Loop Close
Last Answer : A) Break
Description : ………………. is responsible for all aspects of data processing, operation research, organization and method, system analysis and design investments. A) Management Services Director B) Data Processing Manager C) Computer Manager D) Both B and C
Last Answer : A) Management Services Director
Description : Suppose you want to delete the name that occurs before “Vivek” in an alphabetical listing. Which of the following data structures shall be most efficient for this operation? (A) Circular linked list (B) Doubly linked list (C) Linked list (D) Dequeue
Last Answer : (B) Doubly linked list
Description : Which of the following is not a data interfacing format? a.STL b.SLC c.LEAF d.RP
Last Answer : d.RP
Description : Choose the correct sequence to generate prototype a.3D CAD data - CAD solid model - STL file - RP prototype b.CAD solid model - 3D CAD data - RP prototype - STL file c.STL file - 3D CAD data - CAD solid model - RP prototype d.3D CAD data - STL file - CAD solid model - RP prototype
Last Answer : a.3D CAD data - CAD solid model - STL file - RP prototype
Description : Input of RP data is ______ a.CAM data b.CAPP data c.CAD data d.All of the above
Last Answer : c.CAD data
Description : In which addressing the operand is actually present in instruction: a. Immediate addressing b. Direct addressing 9 Register addressing a None of these
Last Answer : a. Immediate addressing
Description : In which addressing the simplest addressing mode where an operand is fetched from memory is a. Immediate addressing b. Direct addressing c. Register addressing d. None of these
Last Answer : b. Direct addressing
Description : In which mode the main memory location holds the EA of the operand: a. Immediate addressing b. Direct addressing c. Register addressing d. Indirect addressing
Last Answer : d. Indirect addressing
Description : Which addressing is an extremely influential way of addressing: a. Displacement addressing b. Immediate addressing 9 Direct addressing a Register addressing
Last Answer : a. Displacement addressing
Description : In post-indexing the contents of the address field are used to access a memory location containing a___ address: Immediate addressing Direct addressing Register addressing ao | None of these
Last Answer : Direct addressing
Description : The final addressing mode that we consider is a. Immediate addressing b. Direct addressing c. Register addressing d. Stack addressing
Last Answer : d. Stack addressing
Description : Which addressing offset can be the content of PC and also can be negative: a. Relative addressing b. Immediate addressing c. Direct addressing d. Register addressing
Last Answer : a. Relative addressing
Description : In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack
Last Answer : b. after OP code in the instruction
Description : The most common addressing techiniques employed by a CPU is a. immediate b. direct c. indirect d. register e. all of the above
Last Answer : e. all of the above
Description : List out any two instructions of following addressing modes: (i) Immediate addressing. (ii) Register addressing.
Last Answer : (i) Immediate addressing instructions: 1. MOV A, #36H 2. MOV DPTR, #27A2H (ii) Register addressing. 1. MOV A, R0 2. MOV R7, A
Description : The advantage of ............... is that it can reference memory without paying the price of having a full memory address in the instruction. (A) Direct addressing (B) Indexed addressing (C) Register addressing (D) Register Indirect addressing
Last Answer : (D) Register Indirect addressing
Description : Debugger is a program that (A) allows to examine and modify the contents of registers (B) does not allow execution of a segment of program (C) allows to set breakpoints, execute a segment of program and display contents of register (D) All of the above
Last Answer : (C) allows to set breakpoints, execute a segment of program and display contents of register
Description : A CPU handles interrupt by executing interrupt service subroutine................. (A) by checking interrupt register after execution of each instruction (B) by checking interrupt register ... cycle (C) whenever an interrupt is registered (D) by checking interrupt register at regular time interval
Last Answer : (A) by checking interrupt register after execution of each instruction
Description : What will be the hexadecimal value in the register ax (32-bit) after executing the following instructions? Mov al, 15 Mov ah, 15 Xor al, al Mov cl, 3 Shr ax, cl Codes: (A) 0F00 h (B) 0F0F h (C) 01E0 h (D) FFFF h
Last Answer : (C) 01E0 h
Description : The ............... addressing mode is similar to register indirect addressing mode, except that an offset is added to the contents of the register. The offset and register are specified in the instruction. (A) Base indexed (B) Base indexed plus displacement (C) Indexed (D) Displacement
Last Answer : (D) Displacement
Description : The Register that stores all interrupt requests is: (A) Interrupt mask register (B) Interrupt service register (C) Interrupt request register (D) Status register
Last Answer : (C) Interrupt request register
Description : Which of the following storage classes have global visibility in C/C++? (1) Auto (2) Extern (3) Static (4) Register