Description : In stack organization address register is known as the: a. Memory stack b. Stack pointer c. Push operation d. Pop operation
Last Answer : b. Stack pointer
Description : Which operation are done by increment or decrement the stack pointer: a. Push b. Pop ce. Both d. None
Last Answer : ce. Both
Description : In register stack items are removed from the stack by using the operation: a. Push b. Pop c. Both d. None
Last Answer : b. Pop
Description : Which is the basic stack operation: a. PUSH b. POP c. BOTH A and B d. None of these
Last Answer : c. BOTH A and B
Description : Inserting an item into the stack when stack is not full is called …………. Operation and deletion of item form the stack, when stack is not empty is called ………..operation. A) push, pop B) pop, push
Last Answer : A) push, pop
Description : SP stand for: a. Stack pointer b. Stack pop c. Stack push d. None of these
Last Answer : a. Stack pointer
Description : Consider the following operations performed on a stack of size 5: Push(a); Pop(); Push(b); Push(c); Pop(); Push(d); Pop(); Pop(); Push(e); Which of the following statements is correct? (A) Underflow occurs (B) Stack operations are performed smoothly (C) Overflow occurs (D) None of the above
Last Answer : (B) Stack operations are performed smoothly
Description : The _stack can be 4-word memory addressed by 2 bits from an up/down counter known as the stack pointer: a. FIFO b. PIPO c. SISO d. LIFO
Last Answer : d. LIFO
Description : In register stack a stack can be organized bya____——_—s number of register. a. Infinite number b. Finite number c. Both d. None
Last Answer : b. Finite number
Description : Stack uses RPN to solve __ expression: a. Logical b. Arithmetic c. Both d. None
Last Answer : b. Arithmetic
Description : It contains the stack for PC storage during subroutine calls and input/output interrupt services: a. Seven- level hardware b. Eight- level hardware
Last Answer : b. Eight- level hardware
Description : ___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory
Last Answer : b. Microprocessor
Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine
Last Answer : d. Executable, Stack and Subroutine
Description : The extent nesting in subroutine is limited only by: a. Number of available Stack locations b. Number of available Addressing locations c. Number of available CPU locations d. Number of available Memory locations
Last Answer : a. Number of available Stack locations
Description : Markers in subroutine cannot be accepted as limits whereas this markers stands for: a. Top of stack b. Bottom of stack c. Middle of stack d. Allof these
Last Answer : a. Top of stack
Description : When a subroutine is the parameters are loaded onto the stack and SCAL is executed: a. Executed b. Invoked c. Ended d. = Started
Last Answer : b. Invoked
Description : By defining the _ __ register as last in first out stack the sequence can handle nested subroutines: a. S b. J ce. R d. T
Last Answer : ce. R
Description : Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer
Last Answer : Cc. Instruction register
Description : A stack in a digital computer isa partofthe_ ALU CPU a. b. c. Memory unit d None of these
Last Answer : c. Memory unit
Description : In register stack a stack can be a finite number of a Control word b. Memory word c Transfer word d. — Allof these
Last Answer : b. Memory word
Description : Which register holds the item that is to be written into the stack or read out of the stack: a. SR b. IR Cc. RR d DR
Last Answer : d DR
Description : In register stack the top item is read from the stack into: a. SR b. IR Cc. RR d. DR
Last Answer : d. DR
Description : The stack pointer is maintained in a : a. Data b. Register c. Address d. None of these
Last Answer : b. Register
Description : ___ mode of addressing is a form of implied addressing: a. Stack b. Array Cc. Queue d. ‘Binary
Last Answer : a. Stack
Description : The final addressing mode that we consider is a. Immediate addressing b. Direct addressing c. Register addressing d. Stack addressing
Last Answer : d. Stack addressing
Description : In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these
Last Answer : ce. MAR
Description : The operation is specified by a binary code known as the a. Operand code b. Opcode c. Source code d. — Allof these
Last Answer : b. Opcode
Description : Compared to hardware, firmware is _ __to design micro programmed organization: a. Difficult b. Easier c. Both a& b d. None of these
Last Answer : b. Easier
Description : Which processor has a single instruction multiple data stream organization that manipulates the common instruction by means of multiple functional units. a. Attached array processor b. SIMD array processor c. Both d. None
Last Answer : b. SIMD array processor
Description : Which machine can perform addition operation in less than 1 ms: a. Digital machine b. Electronic machine c. Both d. None of these
Last Answer : a. Digital machine
Description : Which operation with floating point numbers are more complicated then arithmetic operation with fixed point number . a. Logical operation b. Arithmetic operation c. Both d. None of these
Last Answer : b. Arithmetic operation
Description : Execution of instruction specified by instruction to perform: a. Operation b. Operands c. Both a &b d. None of these
Last Answer : a. Operation
Description : Which are the functioning of I/O interrupt: a. The processor organizes all the I/O operation for smooth functioning b. After completing the I/O operation the device interrupt the processor c. Both d. None of these
Last Answer : b. After completing the I/O operation the device interrupt the processor
Description : Which operation puts memory address in memory address register and data in DR. a Memory read b. Memory write c Both d. None
Last Answer : b. Memory write
Description : Arithmetic operation are carried by such micro operation on stored numeric data available in a. Register b. Data c. Both d. None
Last Answer : a. Register
Description : In arithmetic operation numbers of register and the circuits for addition at a. ALU b. MAR c. Both d. None
Last Answer : a. ALU
Description : Which operation are binary type, and are performed on bits string that is placed in register: a. Logical micro operation b. Arithmetic micro operation c. Both d. None
Last Answer : a. Logical micro operation
Description : A micro operation every bit of a register is a: a. Constant b. Variable c. Both d. None
Last Answer : b. Variable
Description : Which symbol will be used to denote an micro operation. a. (*) b. (v) c. Both d. None
Last Answer : b. (v)
Description : Which operation use one operand or unary operations: a. Arithmetic b. Logical c. Both d. None
Last Answer : c. Both
Description : Arithmetic instruction are used to perform operation on: a. Numerical data b. Non-numerical data c. Both d. None
Last Answer : a. Numerical data
Description : Abus organization for seven __ register: a. ALU b. RISC c. CPU d. MUX
Last Answer : c. CPU
Description : The various file operation are: a. Crating a file b. Writing a file c. Reading a file d. Repositioning within a file e. Deleting a file truncating a file f. All of these
Last Answer : f. All of these
Description : is the inverse operation of addition: a. Addition b. Multiply c. Subtraction d. Divide
Last Answer : c. Subtraction
Description : isacommand given to a computer to perform a specified operation on some given data. a. Aninstruction b. Command c. Code d. None of these
Last Answer : a. Aninstruction
Description : Each operation hasits____—soopcode: a. Unique b. Two c. Three d. Four
Last Answer : a. Unique
Description : specify where to get the source and destination operands for the operation specified by the a. Operand fields and opcode b. Opcode and operand c. Source and destination d. Cpu and memory
Last Answer : a. Operand fields and opcode
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : Which are benefit of input/output interrupt: a. It is an external analogy to exceptions b. The processor initiates and perform all I/O operation c. The data is transferred into the memory through interrupt handler d. = Alllof these
Last Answer : d. = Alllof these
Description : Which are the operation of versatility: a. exchange of information with the outside world via I/O device b. Transfer of data internally with in the central processing unit c. Performs of the basic arithmetic operations d. = Allof these
Last Answer : d. = Allof these