Description : In register stack the top item is read from the stack into: a. SR b. IR Cc. RR d. DR
Last Answer : d. DR
Description : Which types of register holds a single vector containing at least two read ports and one write ports: a. Data system b. Data base Cc. Memory d. Vector register
Last Answer : d. Vector register
Description : The register that includes the address of the memory unit is termed asthe _ a. MAR b PC Cc. IR d. None of these
Last Answer : a. MAR
Description : Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer
Last Answer : Cc. Instruction register
Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine
Last Answer : d. Executable, Stack and Subroutine
Description : ___ mode of addressing is a form of implied addressing: a. Stack b. Array Cc. Queue d. ‘Binary
Last Answer : a. Stack
Description : Which operation puts memory address in memory address register and data in DR. a Memory read b. Memory write c Both d. None
Last Answer : b. Memory write
Description : In register transfer the processor register as. a MAR b PC c IR d RI
Last Answer : d RI
Description : In register transfer which system is a sequential logic system in which flip-flops and gates are constructed: a. Digital system b. Register Cc. Data d. None
Last Answer : a. Digital system
Description : Register are assumed to use positive-edge-triggered _ a. Flip-flop b. Logics Cc. Circuit d. Operation
Last Answer : a. Flip-flop
Description : Parallel computing means doing several takes simultaneously thus improving the performance of the a. Data system b. Computer system Cc. Memory d. Vector register
Last Answer : b. Computer system
Description : By defining the _ __ register as last in first out stack the sequence can handle nested subroutines: a. S b. J ce. R d. T
Last Answer : ce. R
Description : ___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory
Last Answer : b. Microprocessor
Description : In stack organization address register is known as the: a. Memory stack b. Stack pointer c. Push operation d. Pop operation
Last Answer : b. Stack pointer
Description : In register stack a stack can be organized bya____——_—s number of register. a. Infinite number b. Finite number c. Both d. None
Last Answer : b. Finite number
Description : In register stack a stack can be a finite number of a Control word b. Memory word c Transfer word d. — Allof these
Last Answer : b. Memory word
Description : In register stack items are removed from the stack by using the operation: a. Push b. Pop c. Both d. None
Last Answer : b. Pop
Description : The stack pointer is maintained in a : a. Data b. Register c. Address d. None of these
Last Answer : b. Register
Description : The final addressing mode that we consider is a. Immediate addressing b. Direct addressing c. Register addressing d. Stack addressing
Last Answer : d. Stack addressing
Description : Which register holds the next instruction to be executed:
Last Answer : c. Program control register
Description : Which register holds the current instruction to be executed. a. Instruction register b. Program register 9 Control register a None of these
Last Answer : a. Instruction register
Description : In which mode the main memory location holds the EA of the operand: a. Immediate addressing b. Direct addressing c. Register addressing d. Indirect addressing
Last Answer : d. Indirect addressing
Description : Outputs of instruction/data path in CU are. a. Reg R/W b. Load/Reg-Reg c. ALU function select d. Load control e. Read control f. IR Latch g. JUMP/Branch/Next PC h_ = All of these
Last Answer : h_ = All of these
Description : can read any printed character by comparing the pattern that is stored in the computer: a. SP b. CCR Cc. RAG d. OCR
Last Answer : d. OCR
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : which field is used to determine what type of transfer occurs: a CR b. SR c. BR d. MR
Last Answer : a CR
Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next
Last Answer : c. Instruction register, incremented and next
Description : In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these
Last Answer : ce. MAR
Description : IR stands for. a. Input representation b. Intermediate representation c. Both d. None
Last Answer : b. Intermediate representation
Description : function select takes op code in IR translating to function of ALU and it may be compact binary code or one line per ALU: a ALU b CPU c. Memory d. Cache
Last Answer : a ALU
Description : emaphore provides mutual exclusion for accesses to the buffer pool and is initialized to the value: a. Mutex b. Mutual Cc. Memory d. __ Allof these
Last Answer : Mutex
Description : In which section only one process is allowed to access the shared variable and all other have to wait. a. Critical section b. Racing section Cc. Entry section d. Remainder section
Last Answer : . Critical section
Description : hich section is the remaining part of a process’s code: a. Racing section b. Critical section Cc. Entry section d. Reminder secti
Last Answer : b. Entry section
Description : Which are the characteristics of deadlocks. a. Mutual exclusion b. Hold and wait Cc. No pre-emption d. = Circular wait e. Allof these
Last Answer : e. Allof these
Description : How many condition that should be met in order to produce a deadlock. a. 2 b 4 Cc. 6 d 8
Last Answer : b 4
Description : Which are the condition that should be met in order to produce a deadlock. a. Mutual exclusion b. Hold and Wait Cc. No preemption d. Circular wait e. Allofthese
Last Answer : e. Allofthese
Description : a direct arrow is drawn from the process to the resource rectangle to represent each pending resource request: a. TS b. SP Cc. CCR d. RAG
Last Answer : d. RAG
Description : Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these
Last Answer : b. Cache memory
Description : How many system of arithmetic, which are often used in digital system. a. 5 b. 6 Cc. 3 d 4
Last Answer : d 4
Description : How many important ideas to notice about these odometer readings: a. 1 b 2 Cc. 3 d 4
Last Answer : b 2
Description : How many main approaches to algorithm for division: a 2 b 3 Cc. 4 d 5
Last Answer : a 2
Description : 3 bit binary numbers can be represented by a. Binary number b. Decimal number Cc. Hexadecimal number d. Octal number
Last Answer : d. Octal number
Description : Which system groups number by sixteen and power of sixteen. a. Binary b. Hexadecimal Cc. Octal d. None of these
Last Answer : b. Hexadecimal
Description : Which number are used extensively in microprocessor work: a. Octal b. Hexadecimal Cc. Both d. None of these
Description : Counting in hex, each digit can be increment from. a OtoF b. OtoG Cc. Oto H d. Oto]
Last Answer : a OtoF
Description : How many parts of floating point representation of a number consists. a. 4 b 2 Cc. 3 d 5
Description : How many bit of exponent: a. 4 b 6 Cc. 8 d. 10
Last Answer : b 6
Description : In memory transfer location address is supplied by that puts this on address bus. a. ALU b. CPU Cc. MAR d. MDR
Last Answer : b. CPU
Description : is which initializes the value of variable: a. Assignment expression b. Condition value Cc. Increment/decrement d. None of these
Last Answer : a. Assignment expression
Description : Branching is implemented by depending on output of: a CD b RG c. CC d. CR
Last Answer : a CD