Description : In which addressing the simplest addressing mode where an operand is fetched from memory is a. Immediate addressing b. Direct addressing c. Register addressing d. None of these
Last Answer : b. Direct addressing
Description : In which mode the main memory location holds the EA of the operand: a. Immediate addressing b. Direct addressing c. Register addressing d. Indirect addressing
Last Answer : d. Indirect addressing
Description : In which addressing the operand is actually present in instruction: a. Immediate addressing b. Direct addressing 9 Register addressing a None of these
Last Answer : a. Immediate addressing
Description : Which addressing is an extremely influential way of addressing: a. Displacement addressing b. Immediate addressing 9 Direct addressing a Register addressing
Last Answer : a. Displacement addressing
Description : In post-indexing the contents of the address field are used to access a memory location containing a___ address: Immediate addressing Direct addressing Register addressing ao | None of these
Last Answer : Direct addressing
Description : Which addressing offset can be the content of PC and also can be negative: a. Relative addressing b. Immediate addressing c. Direct addressing d. Register addressing
Last Answer : a. Relative addressing
Description : ___ mode of addressing is a form of implied addressing: a. Stack b. Array Cc. Queue d. ‘Binary
Last Answer : a. Stack
Description : In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack
Last Answer : b. after OP code in the instruction
Description : The extent nesting in subroutine is limited only by: a. Number of available Stack locations b. Number of available Addressing locations c. Number of available CPU locations d. Number of available Memory locations
Last Answer : a. Number of available Stack locations
Description : Which one of the following is not an addressing mode? (A) Register indirect (B) Auto increment (C) Relative indexed (D) Immediate operand
Last Answer : (C) Relative indexed
Description : The most common addressing techiniques employed by a CPU is a. immediate b. direct c. indirect d. register e. all of the above
Last Answer : e. all of the above
Description : In which addressing mode the operand is given explicitly in the instruction? A. Absolute B. Immediate C. Indirect D. Direct
Last Answer : B. Immediate
Description : ___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory
Last Answer : b. Microprocessor
Description : By defining the _ __ register as last in first out stack the sequence can handle nested subroutines: a. S b. J ce. R d. T
Last Answer : ce. R
Description : Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer
Last Answer : Cc. Instruction register
Description : In stack organization address register is known as the: a. Memory stack b. Stack pointer c. Push operation d. Pop operation
Last Answer : b. Stack pointer
Description : In register stack a stack can be organized bya____——_—s number of register. a. Infinite number b. Finite number c. Both d. None
Last Answer : b. Finite number
Description : In register stack a stack can be a finite number of a Control word b. Memory word c Transfer word d. — Allof these
Last Answer : b. Memory word
Description : In register stack items are removed from the stack by using the operation: a. Push b. Pop c. Both d. None
Last Answer : b. Pop
Description : Which register holds the item that is to be written into the stack or read out of the stack: a. SR b. IR Cc. RR d DR
Last Answer : d DR
Description : In register stack the top item is read from the stack into: a. SR b. IR Cc. RR d. DR
Last Answer : d. DR
Description : The stack pointer is maintained in a : a. Data b. Register c. Address d. None of these
Last Answer : b. Register
Description : List out any two instructions of following addressing modes: (i) Immediate addressing. (ii) Register addressing.
Last Answer : (i) Immediate addressing instructions: 1. MOV A, #36H 2. MOV DPTR, #27A2H (ii) Register addressing. 1. MOV A, R0 2. MOV R7, A
Description : Which addressing mode is most suitable to change the normal sequence of execution of instructions? A. Immediate B. Indirect C. Relative D. None of the Above
Last Answer : C. Relative
Description : In length instruction some programs wants a complex instruction set containing more instruction, more addressing modes and greater address rang, as in case of a. RISC b. CISC c. Both d. None
Last Answer : b. CISC
Description : Content of the program counter is added to the address part of the instruction in order to obtain the effective address is called_______ A. relative address mode. B. index addressing mode. C. register mode. D. implied mode.
Last Answer : A. relative address mode.
Description : The ............... addressing mode is similar to register indirect addressing mode, except that an offset is added to the contents of the register. The offset and register are specified in the instruction. (A) Base indexed (B) Base indexed plus displacement (C) Indexed (D) Displacement
Last Answer : (D) Displacement
Description : The advantage of ............... is that it can reference memory without paying the price of having a full memory address in the instruction. (A) Direct addressing (B) Indexed addressing (C) Register addressing (D) Register Indirect addressing
Last Answer : (D) Register Indirect addressing
Description : It contains the stack for PC storage during subroutine calls and input/output interrupt services: a. Seven- level hardware b. Eight- level hardware
Last Answer : b. Eight- level hardware
Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine
Last Answer : d. Executable, Stack and Subroutine
Description : Markers in subroutine cannot be accepted as limits whereas this markers stands for: a. Top of stack b. Bottom of stack c. Middle of stack d. Allof these
Last Answer : a. Top of stack
Description : When a subroutine is the parameters are loaded onto the stack and SCAL is executed: a. Executed b. Invoked c. Ended d. = Started
Last Answer : b. Invoked
Description : The _stack can be 4-word memory addressed by 2 bits from an up/down counter known as the stack pointer: a. FIFO b. PIPO c. SISO d. LIFO
Last Answer : d. LIFO
Description : In stack organization the insertion operation is known as : a. Pop b. Push c. Both d. None
Last Answer : b. Push
Description : A stack in a digital computer isa partofthe_ ALU CPU a. b. c. Memory unit d None of these
Last Answer : c. Memory unit
Description : Which operation are done by increment or decrement the stack pointer: a. Push b. Pop ce. Both d. None
Last Answer : ce. Both
Description : Stack uses RPN to solve __ expression: a. Logical b. Arithmetic c. Both d. None
Last Answer : b. Arithmetic
Description : ___in all digital systems actually performs addition that can handle only two number at a time: a Register b. circuit c digital d. — Allof these
Last Answer : b. circuit
Description : Which part is not physically indicated in the register. a. Binary b. Decimal c. Octal d. None of these
Last Answer : b. Decimal
Description : The source/destination of operands can be the_ or one of the general-purpose register: a. Memory b. One c. both d. None of these
Last Answer : a. Memory
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next
Last Answer : c. Instruction register, incremented and next
Description : Which interrupt services save all the register and flags. a. Save interrupt b. Input/output interrupt c. Service interrupt d. All of these
Last Answer : b. Input/output interrupt
Description : Which register holds the next instruction to be executed:
Last Answer : c. Program control register
Description : Which register holds the current instruction to be executed. a. Instruction register b. Program register 9 Control register a None of these
Last Answer : a. Instruction register
Description : Which language is termed as the symbolic depiction used for indicating the series: a. Random transfer language b. Register transfer language c. Arithmetic transfer language d. __ Allof these
Last Answer : b. Register transfer language
Description : The method of writing symbol to indicate a provided computational process is called as a: a. Programming language b. Random transfer language c. Register transfer language d. Arithmetic transfer language
Last Answer : a. Programming language
Description : In which transfer the computer register are indicated in capital letters for depicting its function. a. Memory transfer b. Register transfer c. Bus transfer d. None of these
Last Answer : b. Register transfer
Description : The register that includes the address of the memory unit is termed asthe _ a. MAR b PC Cc. IR d. None of these
Last Answer : a. MAR
Description : In register transfer the processor register as. a MAR b PC c IR d RI
Last Answer : d RI