Description : Who determine under what conditions the branching will occur and when. a. By combination of CD and BT b. By combination of CD and BR c. By combination of CD and CR d. By combination of TD and BR
Last Answer : b. By combination of CD and BR
Description : Which field is used to requests for branching: a. DR b. CR c. TR d BR
Last Answer : d BR
Description : Coefficient of discharge Cd is equal to (where Cc = Coefficient of contraction, Cv = Coefficient of velocity, and Cr = Coefficient of resistance) (A) Cc × Cv (B) Cc × Cr (C) Cv × Cr (D) Cc /Cr
Last Answer : Answer: Option A
Description : Ina complex program, the overlaps: a. Branching b. Condition c. Botha &b d. None of these
Last Answer : a. Branching
Description : PC can be loaded from. a. BR b. CR c. AR d. TR
Last Answer : c. AR
Description : which field is used to determine what type of transfer occurs: a CR b. SR c. BR d. MR
Last Answer : a CR
Description : Which operation are implemented using a binary counter or combinational circuit: a Register transfer b. Arithmetic c. Logical d. __ Allof these
Last Answer : b. Arithmetic
Description : Which control unit is implemented as combinational circuit in the hardware. a. Microprogrammed control unit b. Hardwired control unit c Blockprogrammed control unit d. Macroprogrammed control unit
Last Answer : b. Hardwired control unit
Description : emaphore provides mutual exclusion for accesses to the buffer pool and is initialized to the value: a. Mutex b. Mutual Cc. Memory d. __ Allof these
Last Answer : Mutex
Description : In which section only one process is allowed to access the shared variable and all other have to wait. a. Critical section b. Racing section Cc. Entry section d. Remainder section
Last Answer : . Critical section
Description : hich section is the remaining part of a process’s code: a. Racing section b. Critical section Cc. Entry section d. Reminder secti
Last Answer : b. Entry section
Description : Which are the characteristics of deadlocks. a. Mutual exclusion b. Hold and wait Cc. No pre-emption d. = Circular wait e. Allof these
Last Answer : e. Allof these
Description : How many condition that should be met in order to produce a deadlock. a. 2 b 4 Cc. 6 d 8
Last Answer : b 4
Description : Which are the condition that should be met in order to produce a deadlock. a. Mutual exclusion b. Hold and Wait Cc. No preemption d. Circular wait e. Allofthese
Last Answer : e. Allofthese
Description : a direct arrow is drawn from the process to the resource rectangle to represent each pending resource request: a. TS b. SP Cc. CCR d. RAG
Last Answer : d. RAG
Description : Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these
Last Answer : b. Cache memory
Description : can read any printed character by comparing the pattern that is stored in the computer: a. SP b. CCR Cc. RAG d. OCR
Last Answer : d. OCR
Description : How many system of arithmetic, which are often used in digital system. a. 5 b. 6 Cc. 3 d 4
Last Answer : d 4
Description : How many important ideas to notice about these odometer readings: a. 1 b 2 Cc. 3 d 4
Last Answer : b 2
Description : How many main approaches to algorithm for division: a 2 b 3 Cc. 4 d 5
Last Answer : a 2
Description : 3 bit binary numbers can be represented by a. Binary number b. Decimal number Cc. Hexadecimal number d. Octal number
Last Answer : d. Octal number
Description : Which system groups number by sixteen and power of sixteen. a. Binary b. Hexadecimal Cc. Octal d. None of these
Last Answer : b. Hexadecimal
Description : Which number are used extensively in microprocessor work: a. Octal b. Hexadecimal Cc. Both d. None of these
Description : Counting in hex, each digit can be increment from. a OtoF b. OtoG Cc. Oto H d. Oto]
Last Answer : a OtoF
Description : How many parts of floating point representation of a number consists. a. 4 b 2 Cc. 3 d 5
Description : How many bit of exponent: a. 4 b 6 Cc. 8 d. 10
Last Answer : b 6
Description : The register that includes the address of the memory unit is termed asthe _ a. MAR b PC Cc. IR d. None of these
Last Answer : a. MAR
Description : In memory transfer location address is supplied by that puts this on address bus. a. ALU b. CPU Cc. MAR d. MDR
Last Answer : b. CPU
Description : In register transfer which system is a sequential logic system in which flip-flops and gates are constructed: a. Digital system b. Register Cc. Data d. None
Last Answer : a. Digital system
Description : Register are assumed to use positive-edge-triggered _ a. Flip-flop b. Logics Cc. Circuit d. Operation
Last Answer : a. Flip-flop
Description : is which initializes the value of variable: a. Assignment expression b. Condition value Cc. Increment/decrement d. None of these
Last Answer : a. Assignment expression
Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine
Last Answer : d. Executable, Stack and Subroutine
Description : Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer
Last Answer : Cc. Instruction register
Description : How many bits of OPR select one of the operations in the ALU: a. 2 b 3 Cc. 4 dad 5
Last Answer : dad 5
Description : Which register holds the item that is to be written into the stack or read out of the stack: a. SR b. IR Cc. RR d DR
Last Answer : d DR
Description : In register stack the top item is read from the stack into: a. SR b. IR Cc. RR d. DR
Last Answer : d. DR
Description : Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU
Last Answer : b. Main memory
Description : Ininstruction formats the information required by the _ for execution: a. ALU b. CPU Cc. RISC d. DATA
Description : ___ mode of addressing is a form of implied addressing: a. Stack b. Array Cc. Queue d. ‘Binary
Last Answer : a. Stack
Description : In data transfer manipulation designing as instruction set for a system isa complex_ a. Art b. System Cc. Computer d. None of these
Last Answer : a. Art
Description : Which is always considered as short jumps: a. Conditional jump b. Short jump Cc. Near jump d. Far jump
Last Answer : a. Conditional jump
Description : NUMA stands for. a. Number Uniform memory access b. Not Uniform memory access Cc. Non Uniform memory access d. __ Allof these
Last Answer : a. Number Uniform memory access
Description : Which types of register holds a single vector containing at least two read ports and one write ports: a. Data system b. Data base Cc. Memory d. Vector register
Last Answer : d. Vector register
Description : Parallel computing means doing several takes simultaneously thus improving the performance of the a. Data system b. Computer system Cc. Memory d. Vector register
Last Answer : b. Computer system
Description : In the case of a left arithmetic shift , zeros are Shifted to the 3 a. Left b. Right Cc. Up d. Down
Last Answer : b. Right
Description : In the case of a right arithmetic shift the sign bit values are shifted to the a. Left b. Right Cc. Up d. Down
Last Answer : a. Left
Description : Which is an important data transfer technique . a. CPU b. DMA Cc. CAD d. None of these
Last Answer : b. DMA
Description : Which algorithm are used depending on the size of the numbers: a. Simple algorithm b. Specific algorithm c. Both d. None of these
Last Answer : b. Specific algorithm
Description : Source statements consist of 5fields in microinstruction source code are: a. Lable b. Micro-ops c. CD-spec d. BR-spec e. Address f. All of these
Last Answer : f. All of these
Description : It contains the stack for PC storage during subroutine calls and input/output interrupt services: a. Seven- level hardware b. Eight- level hardware
Last Answer : b. Eight- level hardware