An OR gate has 6 inputs. The number of input words in its truth table are

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An OR gate has 6 inputs. The number of input words in its truth table are 64.

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The output of a 2-input NAND gate with high at both the inputs will be

Description : The output of a 2-input NAND gate with high at both the inputs will be • High • Low • High & low • None of the above.

Last Answer : The output of a 2-input NAND gate with high at both the inputs will be Low

In case of OR gate, no matter what the number of inputs, a

Last Answer :  In case of OR gate, no matter what the number of inputs, a 1 at any input causes the output to be at logic 1.

For a NAND gate, when one or more inputs are low then the output will be

Description :  For a NAND gate, when one or more inputs are low then the output will be A) Low B) High C) Alternately high and low D) High or low depending on relative magnitude of inputs 

Last Answer :  For a NAND gate, when one or more inputs are low then the output will be High 

Output of NAND gate is 0. for three inputs when:

Description : Output of NAND gate is 0. for three inputs when:

Last Answer : Output of NAND gate is 0. for three inputs when: all the inputs are 1

The gate whose output is LOW, if and only if all the inputs are HIGH, is

Description : The gate whose output is LOW, if and only if all the inputs are HIGH, is

Last Answer : The gate whose output is LOW, if and only if all the inputs are HIGH, is NAND

A gate in which all inputs must be low to get a high output is called

Last Answer : A gate in which all inputs must be low to get a high output is called A NOR gate.

Which set of truth table input signals will result in an output signal value of 1 from the 'AND' gate as shown in the illustration? EL-0035 A. 1-Jan B. Jan-00 C. 0-1 D. 0-0

Description : Which set of truth table input signals will result in an output signal value of 1 from the 'AND' gate as shown in the illustration? EL-0035 A. 1-Jan B. Jan-00 C. 0-1 D. 0-0

Last Answer : Answer: A

How many minimum number of NOR gates are required to realize a two-input X-OR gate?

Description : How many minimum number of NOR gates are required to realize a two-input X-OR gate?

Last Answer : 5

The o/p of a 2 - input OR gate is 1 when its

Description : The o/p of a 2 - input OR gate is 1 when its   1. both inputs are 1 2. both inputs are 0 3.either input is 1 4. either input is 0 

Last Answer : The o/p of a 2 - input OR gate is 1 when its either input is 1 

The output of an exclusive–NOR gate is 1. Which input combination is correct?

Description : The output of an exclusive–NOR gate is 1. Which input combination is correct? (1) A = 1, B = 0 (2) A = 0, B = 1 (3) A = 0, B = 0 (4) None of these 

Last Answer : The output of an exclusive–NOR gate is 1. Which input combination is correct? (1) A = 1, B = 0 (2) A = 0, B = 1 (3) A = 0, B = 0 (4) None of these 

When A = 0., B = 0, C = 1 then in two input logic gate we get gate

Description :  When A = 0., B = 0, C = 1 then in two input logic gate we get gate  (A) XOR gate (B) AND gate (C) NAND gate (D) NOR gate

Last Answer :  When A = 0., B = 0, C = 1 then in two input logic gate we get gate NAND gate

A two-input X-OR gate will produce a HIGH output when the inputs are at what logic levels?

Description : A two-input X-OR gate will produce a HIGH output when the inputs are at what logic levels?

Last Answer : . One or the other of the inputs must be HIGH, but not both at the same time.

What is the equivalent logic gate of a two-input NAND gate with both inputs inverted?

Description : What is the equivalent logic gate of a two-input NAND gate with both inputs inverted?

Last Answer : OR gate.

What is the output Boolean expression for an AND gate with A and B as inputs when the B input is inverted?

Description : What is the output Boolean expression for an AND gate with A and B as inputs when the B input is inverted?

Last Answer : AB

The output of two inputs OR gate is zero only when: (a) Both are one (b) Both are zero (c) Either input is 1 (d) None

Description : The output of two inputs OR gate is zero only when: (a) Both are one (b) Both are zero (c) Either input is 1 (d) None

Last Answer : (b) Both are zero

State Demorgan's theorem's and prove both theorems using truth table.

Description : State Demorgan's theorem's and prove both theorems using truth table.

Last Answer : De Morgan's 1st theorem states that when the OR sum of two variables is inverted, this is the same as inverting each variable individually and then ANDing these inverted variables. De Morgan's 2nd ... individually and then ORing them. In Boolean equation form it can be written as

Function of OR Gate its logical symbol and truth table.

Description : Function of OR Gate its logical symbol and truth table.

Last Answer : Function: - OR gate is used to perform logical addition. So used in adder subtractor and logic circuits where logical Oring is required. Used to implement SOP form equations. Also used in PLA logic. Logical symbol of OR gate :- Truth table:- 

Draw the symbol, logic expression and truth table of NOR gate.

Description : Draw the symbol, logic expression and truth table of NOR gate.

Last Answer : symbol, logic expression and truth table of NOR gate

State functions of preset, clear, clock and SR inputs related to SR flip flop.

Description : State functions of preset, clear, clock and SR inputs related to SR flip flop.

Last Answer : Preset Input: is an asynchronous input to set the Q output to 1 Clear Input: is also asynchronous input to reset the Q output to 0 Clock Input: is used to input external logic clock pulse (HIGH-LO) to ... set the Q output. And R is the reset input which is used to reset Q output of the flipflop.

The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’

Description : The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’ with one of the following conditions by applying A) J = 0, K = 0 and using a clock B) J = 1, K = 0 and using the clock C) Asynchronous preset input D) J = 1, K = 1 and using the clock 

Last Answer : The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’ with one of the following conditions by applying J = 1, K = 1 and using the clock 

For the circuit shown in figure, the Boolean expression for the output y in terms of inputs P, Q, R and S is

Description : For the circuit shown in figure, the Boolean expression for the output y in terms of inputs P, Q, R and S is

Last Answer : For the circuit shown in figure, the Boolean expression for the output y in terms of inputs P, Q, R and S is P+Q+R+S

What is the number of rows of a logical gate with three inputs ?

Description : What is the number of rows of a logical gate with three inputs ?

Last Answer : There are 8 rows of logical gates with three inputs .

A NOR gate is equivalent to a bubbled AND gate. This statement is an outcome of:

Description : A NOR gate is equivalent to a bubbled AND gate. This statement is an outcome of: (1) De Morgan’s Law (2) Involution Law (3) Law of Absorption (4) Idempotent Law

Last Answer : A NOR gate is equivalent to a bubbled AND gate. This statement is an outcome of: De Morgan’s Law 

Read the following statements: i. Gate is a combinational logic. ii. JK Flip-flop in toggle mode is not

Description : Read the following statements: i. Gate is a combinational logic. ii. JK Flip-flop in toggle mode is not combinational logic. iii. MSJK Flip-flop suffers from race-around. iv. Counters are sequential circuits. Which choice is correct? (A) i, ii (B) i, ii, iv (C) ii, iii, iv (D) i, ii, iii

Last Answer : Read the following statements: i. Gate is a combinational logic. ii. JK Flip-flop in toggle mode is not combinational logic. iii. MSJK Flip-flop suffers from race-around. iv. Counters are sequential circuits. Which choice is ... (A) i, ii (B) i, ii, iv (C) ii, iii, iv (D) i, ii, iii

The fan put of a 7400 NAND gate is

Last Answer : The fan put of a 7400 NAND gate is 10TTL.

An AND gate will function as OR if

Last Answer : An AND gate will function as OR if all the inputs and outputs are complemented.

A NAND gate is called a universal logic element because

Last Answer : A NAND gate is called a universal logic element because any logic function can be realized by NAND gates alone.

A NAND gate has:

Last Answer : A NAND gate has: LOW inputs and a HIGH output

In integrated circuit electronics the basic universal gate is

Last Answer : In integrated circuit electronics the basic universal gate is AND gate.

What is the purpose of a NAND gate?

Description : What is the purpose of a NAND gate?

Last Answer : Nand gate has 2 inputs and only 1 output and it is equivalent of an and gate. The output of a nand gate is high(1) only when anyone or both inputs are low(0).and the output of nand gate is low(0) only when both the inputs are high(1).nand gate is also called as universal gate.

What is an inverter gate?

Description : What is an inverter gate?

Last Answer : Not gate is known as inverter gate as it inverts the I/P

What does the AND gate do?

Description : What does the AND gate do?

Last Answer : AND gate multiple two inputs. If any one input is zero output will be zero if both inputs are one then only output is one.

The output of a logic gate is 1 when all its inputs are at logic 0. the gate is either (A) a NAND or an EX-OR (B) an OR or an EX-NOR (C) an AND or an EX-OR (D) a NOR or an EX-NOR

Description : The output of a logic gate is 1 when all its inputs are at logic 0. the gate is either (A) a NAND or an EX-OR (B) an OR or an EX-NOR (C) an AND or an EX-OR (D) a NOR or an EX-NOR

Last Answer : (D) a NOR or an EX-NOR

The output of logic gate is '1' when all its inputs are at logic '0' The gate is

Description : The output of logic gate is '1' when all its inputs are at logic '0' The gate is (A) NAND/EX-OR (B) NOR/EX-OR (C) AND/EX-NOR (D) NOR/EX-NOR

Last Answer : The answer is (D) If we take two input A and B, and corresponding output Y then for nor gate Y = complement of (A+B)  ;for ex-nor gate Y= A.B + complement of(A.B) The above two relation showing always Y =1 for A=0,B=0.

As shown in the illustration, which set of truth table input signals will result in an output signal at point 'Y'? EL-0035 A. 0-0 B. 0-1 C. Jan-00 D. 1-Jan

Description : As shown in the illustration, which set of truth table input signals will result in an output signal at point 'Y'? EL-0035 A. 0-0 B. 0-1 C. Jan-00 D. 1-Jan

Last Answer : Answer: D

What will be found in the output if two inputs of Ex-OR gate are high ?

Description : What will be found in the output if two inputs of Ex-OR gate are high ?

Last Answer : If two inputs of Ex-OR gate are high then 0 will be found in the output .

How many inputs and how many outputs of NOT gate ?

Description : How many inputs and how many outputs of NOT gate ?

Last Answer : NOT Gate has one input and one output.

In a logic circuit the NOR and NAND gate functions ____________. A. must be accomplished with a common base transistor arrangement B. are available in diode form C. are exact opposites with the same NOR and NAND inputs D. have output conditions that are exact opposites to the output condition for OR and AND, respectively

Description : In a logic circuit the NOR and NAND gate functions ____________. A. must be accomplished with a common base transistor arrangement B. are available in diode form C. are exact opposites with the ... . have output conditions that are exact opposites to the output condition for OR and AND, respectively

Last Answer : Answer: D

. What will be the output of an X-NOR gate when both inputs are LOW?

Description : . What will be the output of an X-NOR gate when both inputs are LOW?

Last Answer : HIGH.

What will be the output of an X-OR gate when both inputs are HIGH?

Description : What will be the output of an X-OR gate when both inputs are HIGH?

Last Answer : Low (0)

In what state must the inputs to a NOR gate be in order to produce a logic 1 output?

Description : In what state must the inputs to a NOR gate be in order to produce a logic 1 output?

Last Answer : All inputs must be low.

What is the output Boolean expression for a NOR gate with R and T as inputs?

Description : What is the output Boolean expression for a NOR gate with R and T as inputs?

Last Answer : (R +T)’

What will be the output of a NOR gate when both inputs are HIGH?

Description : What will be the output of a NOR gate when both inputs are HIGH?

Last Answer : Low.

A NAND gate has inputs labeled as A, B, and C. If A and B are HIGH, C must be at what logic level to produce a HIGH output?

Description : A NAND gate has inputs labeled as A, B, and C. If A and B are HIGH, C must be at what logic level to produce a HIGH output?

Last Answer : . Low.

What is the output Boolean expression for a NAND gate with inputs A, B, and C?

Description : What is the output Boolean expression for a NAND gate with inputs A, B, and C?

Last Answer : C B A

What must be the state of the inputs to a NAND gate in order to produce a LOW output?

Description : What must be the state of the inputs to a NAND gate in order to produce a LOW output?

Last Answer : All inputs must be HIGH.

A NAND gate has Z and X as inputs. What will be the output logic level if Z is HIGH and X is LOW? A NAND gate has Z and X as inputs. What will be the output logic level if Z is HIGH and X is LOW?

Description : A NAND gate has Z and X as inputs. What will be the output logic level if Z is HIGH and X is LOW?

Last Answer : HIGH.

What is the Boolean expression for the output of an AND gate that has R and S as inputs?

Description : What is the Boolean expression for the output of an AND gate that has R and S as inputs?

Last Answer : f = RS.

The NOR gate output will be low if the two inputs are (A) 00 (B) 01 (C) 10 (D) 11

Description : The NOR gate output will be low if the two inputs are (A) 00 (B) 01 (C) 10 (D) 11

Last Answer : A

The NAND gate output will be low if the two inputs are (A) 00 (B) 01 (C) 10 (D) 11

Description : The NAND gate output will be low if the two inputs are (A) 00 (B) 01 (C) 10 (D) 11

Last Answer : (D) 11