Description : Abus organization for seven __ register: a. ALU b. RISC c. CPU d. MUX
Last Answer : c. CPU
Description : How many bits of OPR select one of the operations in the ALU: a. 2 b 3 Cc. 4 dad 5
Last Answer : dad 5
Description : Ininstruction formats the information required by the _ for execution: a. ALU b. CPU Cc. RISC d. DATA
Last Answer : b. CPU
Description : Modern assemblers for RISC based architectures make optimization of instruction scheduling to make use of CPU __ efficiently: a. Pipeline b. Without pipeline c. Botha &b d. None of these
Last Answer : a. Pipeline
Description : The variable of __ correspond to hardware register: a. RAM b. RIL c. ALU d. MAR
Last Answer : b. RIL
Description : Which are contains one or more register that may be referenced by machine instruction: a. Input b. Output c. CPU d. ALU
Description : is just like a circular array: a. Data b. Register c. ALU d. CPU
Last Answer : b. Register
Description : Before checking the program for errors in translating code into machine language the high level language code is loaded into __ a. Register b. Memory c. Data d. CPU
Last Answer : b. Memory
Description : How is selects the register that receives the information from the output bus. Decoder Encoder MUX
Last Answer : Decoder
Description : In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these
Last Answer : ce. MAR
Description : In arithmetic operation numbers of register and the circuits for addition at a. ALU b. MAR c. Both d. None
Last Answer : a. ALU
Description : Which operation are implemented using a binary counter or combinational circuit: a Register transfer b. Arithmetic c. Logical d. __ Allof these
Last Answer : b. Arithmetic
Description : function select takes op code in IR translating to function of ALU and it may be compact binary code or one line per ALU: a ALU b CPU c. Memory d. Cache
Last Answer : a ALU
Description : How many bits of mantissa : a. 4 b. 8 ec. 10 d. 16
Last Answer : ec. 10
Description : Control memory is part of __ that has addressable storage registers and used as temporary storage for data. a. ROM b. RAM c. CPU d. Memory
Last Answer : b. RAM
Description : Which operation are binary type, and are performed on bits string that is placed in register: a. Logical micro operation b. Arithmetic micro operation c. Both d. None
Last Answer : a. Logical micro operation
Description : In RISC architecture access to registers is made as a block and register file in a particular register can be selected by using: a. Multiplexer b. Decoder c. Subtractor d. Adder
Last Answer : b. Decoder
Description : Which control transfer passes the function viacontrol_ a Logic b. Operation ce. Circuit d. __ Allof these
Last Answer : ce. Circuit
Description : A binary number with 8 bits is called asa___ a. Bytes b. Bits c. Nibble d. __ Allof these
Last Answer : a. Bytes
Description : sis given an instruction in machine language this instruction is fetched from the memory by the CPU to execute: a. ALU b. CPU c. MU d. All of these
Description : Which is the most important component of a digit computer that interprets the instruction and processes the data contained in computer programs: MU b. ALU c. CPU d. PC
Description : Which part work as a the brain of the computer and performs most of the calculation: a. MU b. PC c. ALU d. CPU
Last Answer : d. CPU
Description : In memory transfer location address is supplied by that puts this on address bus. a. ALU b. CPU Cc. MAR d. MDR
Description : Which are internal operations inside CPU: a. Data transfer b/w registers b. Instructing ALU to operate data c. Regulation of other internal operations d. All of these
Last Answer : d. All of these
Description : A stack in a digital computer isa partofthe_ ALU CPU a. b. c. Memory unit d None of these
Last Answer : c. Memory unit
Description : Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU
Last Answer : b. Main memory
Description : Outputs of instruction/data path in CU are. a. Reg R/W b. Load/Reg-Reg c. ALU function select d. Load control e. Read control f. IR Latch g. JUMP/Branch/Next PC h_ = All of these
Last Answer : h_ = All of these
Description : __is data paths there is movement of data from one register to another or b/w ALU and a register. a. External b. Boreal c. Internal d. Exchange
Last Answer : c. Internal
Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next
Last Answer : c. Instruction register, incremented and next
Description : Which language is termed as the symbolic depiction used for indicating the series: a. Random transfer language b. Register transfer language c. Arithmetic transfer language d. __ Allof these
Last Answer : b. Register transfer language
Description : A flag isa __ __that keep track of a changing condition during computer run: a. Memory b. Register c. Controller d. None of these
Last Answer : d. None of these
Description : By defining the _ __ register as last in first out stack the sequence can handle nested subroutines: a. S b. J ce. R d. T
Last Answer : ce. R
Description : A structure that stores a number of bits taken "together as a unit" is a a. gate b. mux c. decoder d. register
Last Answer : d. register
Description : Decoding of an instruction in RISC architecture means decision on working of control unit for: a. Remainder of instructions b. _ Divisor of instructions c. Dividend of instructions d. None of these
Last Answer : a. Remainder
Description : Various machine level components are: a. Address register > Program counter c Data register d. Accumulator register e. Memory of 2K,16 bits/word RAM f. Multiplexers g. Allof these
Last Answer : g. Allof these
Description : ___uses the stack to store return address of subroutine: a. CPU b. Microprocessor c. register d. memory
Last Answer : b. Microprocessor
Description : The function of these microinstructions is to issue the micro orders to_ _ a. CPU b. Memory c. Register d. Accumulator
Last Answer : a. CPU
Description : Addresses in control memory is made by for each register group: a. Address select logic b. Data select logic c. Control select logic d. All of these
Last Answer : a. Address select logic
Description : The section of the CPU that selects, interprects and monitors the execution of program instructions is (1) Memory (2) Register (3) Control unit (4) ALU
Last Answer : Control unit
Description : How many algorithm based on add/subtract and shift category: a. 2 b 64 ec. 8 d 6
Last Answer : ec. 8
Description : Which operation is used to shift the content of an operand to one or more bits to provide necessary variation: a. Logical and bit manipulation b. Shift manipulation c. Circular manipulation d. None of these
Last Answer : b. Shift manipulation
Description : specify where to get the source and destination operands for the operation specified by the a. Operand fields and opcode b. Opcode and operand c. Source and destination d. Cpu and memory
Last Answer : a. Operand fields and opcode
Description : The control unit and arithmetic logic unit are know as the __ a. Central program unit b. Central processing unit
Last Answer : b. Central processing unit
Description : function is used to transfer the control to end of a program which uses one argument( ) and takes value is zero for_ __ termination and non-zero for _termination: a. _ Exit( ) normal, abnormal b. Break, normal, abnormal Botha & b None of these
Last Answer : a. _ Exit( ) normal, abnormal
Description : Who change the address in the program counter and cause the flow of control to be altered: a Shift manipulation b. Circular manipulation c. Program control instruction d. __ Allof these
Last Answer : c. Program control instruction
Description : which are of the following modern assemblers: a. MIPS b. Sun SPARC c. HP PA-RISC d, x86(x64) e. all of these
Last Answer : e. all of these
Description : In length instruction some programs wants a complex instruction set containing more instruction, more addressing modes and greater address rang, as in case of a. RISC b. CISC c. Both d. None
Last Answer : b. CISC
Description : In length instruction other programs on the other hand, want a small and fixed-size instruction set that contains only a limited number of opcodes, as in case of a. RISC b CISC c. Both d. None
Last Answer : a. RISC
Description : Which is a type of microprocessor that is designed with limited number of instructions: a. CISC b. RISC ce. Both d. None
Last Answer : ce. Both
Description : Which is a method of decomposing a sequential process into sub operations: a. Pipeline b. CISC c. RISC d. Database