Description : Which register is used to communicate with memory: a. MAR b. MDR c. Both A and B d. None of these
Last Answer : c. Both A and B
Description : In memory transfer location address is supplied by that puts this on address bus. a. ALU b. CPU Cc. MAR d. MDR
Last Answer : b. CPU
Description : MAR stands for: a. Memory address register b. Memory address recode c. Micro address register d. None of these
Last Answer : a. Memory address register
Description : MDR stands for: a. Memory data register b. Memory data recode c. Micro data register d. None of these
Last Answer : a. Memory data register
Description : The information is transferred from the_____ and ____ specified register: a. MDR b. CPU c. Both A and B
Description : The information on the data bus is transferred to the ______register: a. MOC b. MDR c. VAM d. CPU
Last Answer : b. MDR
Description : MDR(Memory Data Register) holds the --- 1) Segment number 2) Address of a memory location 3) Number of transistors 4) none of these
Last Answer : 3) Number of transistors
Description : How many bit of MAR register: a. 8-bit b. 16-bit c. 32-bit d. 64-bit
Last Answer : b. 16-bit
Description : What does MAR stand for? a) Main Address Register b) Memory Access Register c) Main Accessible Register d) Memory Address Register
Last Answer : Answer: d Explanation: MAR is a type of register which is responsible for the fetch operation. MAR is connected to the address bus and it specifies the address for the read and write operations
Description : The decoded instruction is stored in ______ (A) Register (B) Memory Address Register(MAR) (C) Instruction Register(IR) (D) None of the Above
Last Answer : (C) Instruction Register(IR)
Description : Which registers can interact with secondary memory? (A) Register (B) Memory Address Register(MAR) (C) Instruction Register(IR) (D) None of the Above
Last Answer : (B) Memory Address Register(MAR)
Description : The register that includes the address of the memory unit is termed asthe _ a. MAR b PC Cc. IR d. None of these
Last Answer : a. MAR
Description : In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these
Last Answer : ce. MAR
Description : A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored
Last Answer : a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory.
Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory Address Register b. Memory Data Register c. Instruction Register d. Program Register
Last Answer : d. Program Register
Description : Registers, which are partially visible to users and used to hold conditional, are known as a. PC b. Memory address registers c. General purpose register d. Flags
Last Answer : c. General purpose register
Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter
Last Answer : d. Program counter
Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address register b. Memory data register c. Instruction registers d. Program counter
Last Answer : c. Instruction registers
Description : A type of core store that has a lower access time than the devices used for working store in the same processor is known as a. Core memory b. Buffer c. Fast core d. Address register
Last Answer : d. Address register
Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address registers b. Memory data registers c. Instruction register d. Program counter
Last Answer : c. Instruction register
Description : How do the contents of the MAR and MDR registers changes during the fetch decode execute cycle?
Last Answer : Need answer
Description : A 32-bit address bus allows access to a memory of capacity(a) 64 Mb (b) 16 Mb (c) 1Gb (d) 4 Gb 2.Which processor structure is pipelined? a) all x80 processors b) all x85 processors c) all x86 processors
Last Answer : c) all x86 processors
Description : A physical connection between the microprocessor memory and other parts of the m9crocomputer is known as a. Path b. Address bus c. Route d. All of the above
Last Answer : b. Address bus
Description : The lower red curvy arrow show that CPU places the address extracted from the memory location on the_____: a. Address bus b. System bus c. Control bus d. Data bus
Last Answer : a. Address bus
Description : ED stands for: a. Enable MRD b. Enable MDR c. Both a and b d. None of these
Last Answer : b. Enable MDR
Description : Which microprocessor to read an item from memory: a. VAM b. SAM c. MOC d. None of these
Last Answer : b. SAM
Description : The ____ place the data from a register onto the data bus: a. CPU b. ALU c. Both A and B d. None of these
Last Answer : a. CPU
Description : _____ a subsystem that transfer data between computer components inside a computer or between computer: a. Chip b. Register c. Processor d. Bus
Last Answer : d. Bus
Description : What is the address range of SFR Register bank? a) 00H-77H b) 40H-80H c) 80H-7FH d) 80H-FFH
Last Answer : c) 80H-7FH
Last Answer : d) 80H-FFH
Description : LM stands for: a. Least MAR b. Load MAR c. Least MRA d. Load MRA
Last Answer : b. Load MAR
Description : System Bus Contains: a. Address Bus b. Data Bus c. Control Bus d. All of these
Last Answer : d. All of these
Description : The ________ ensures that only one IC is active at a time to avoid a bus conflict caused by two ICs writing different data to the same bus.A.control busB.control instructionsC. address decoder D.CPU
Last Answer : C. address decoder
Description : Which bus plays a crucial role in I/O: a. System bus b. Control bus c. Address bus d. Both A and B
Last Answer : b. Control bus
Description : The problem of bus confect and sparse address distribution are eliminated by the use of ______ address technique: a. Fully decoding b. Half decoding c. Both a & b d. None of these
Last Answer : a. Fully decoding
Description : In linear decoding address bus of 16-bit wide can connect only ____ of RAM. a. 16 KB b. 6KB c. 12KB d. 64KB
Last Answer : b. 6KB
Description : The capacity of this chip is 1KB they are organized in the form of 1024 words with 8 bit word The what is the site of address bus: a. 8 bit b. 10 bit c. 12 bit d. 16 bit
Last Answer : b. 10 bit
Description : Which bus transfer singles from the CPU to external device and others that carry singles from external device to the CPU: a. Control bus b. Data bus c. Address bus d. None of these
Last Answer : a. Control bus
Description : CPU can read & write data by using : a. Control bus b. Data bus c. Address bus d. None of these
Last Answer : b. Data bus
Description : The processor 80386/80486 and the Pentium processor uses _____ bits address bus: a. 16 b. 32 c. 36 d. 64
Last Answer : b. 32
Description : A 16 bit address bus can generate___ addresses: a. 32767 b. 25652 c. 65536 d. none of these
Last Answer : c. 65536
Description : Which bus carry addresses: a. System bus b. Address bus c. Control bus d. Data bus
Description : If ______input pin of 80386 if activated, allows address pipelining during 80386 bus cycles. a) BS16 b) NA c) PEREQ d) ADS
Last Answer : a) BS16
Description : In 8096, CCB bit 3 is ____. a) write strobe mode select b) address valid strobe select c) bus width select d) Internal read control mode
Last Answer : c) bus width select
Last Answer : b) address valid strobe select
Description : What does microprocessor speed depends on? a) Clock b) Data bus width c) Address bus width
Last Answer : c) Address bus width
Description : In 8086 microprocessor , the address bus is ________ bit wide A. 12 bit B. 10 bit C. 16 bit D. 20 bit
Last Answer : In 8086 microprocessor, the address bus is 20 bit
Description : Which is an integral part of any microcomputer system and its primary purpose is to hold program and data: a. Memory unit b. Register unit c. A and B d. None of these
Last Answer : a. Memory unit
Description : In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack
Last Answer : b. after OP code in the instruction