The contents of Register (BL) and Register (AL) of 8085 microprocessor are 49H and 3AH respectively. The contents of AL, the status of carry flag (CF) and sign flag (SF) after executing 'SUB AL, BL' assembly language instruction, are (1) AL=0FH; CF=1; SF=1 (2) AL=F0H; CF=0; SF=0 (3) AL=F1H; CF=1; SF=1 (4) AL=1FH; CF=1; SF=1

The contents of Register (BL) and Register (AL) of 8085 microprocessor are 49H and 3AH respectively. The contents of AL, the status of carry flag (CF) and sign flag (SF) after executing 'SUB AL, BL' assembly language instruction, are (1) AL=0FH; CF=1; SF=1 (2) AL=F0H; CF=0; SF=0 (3) AL=F1H; CF=1; SF=1 (4) AL=1FH; CF=1; SF=1
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What is the output of the following code AL=00110101 BL= 39H M. Krishna Kumar/IISc. Bangalore M2/V1/June 04/1 Microprocessors and Microcontrollers/Assembly language of 8086 Multiple Choice Questions SUB AL, BL AAS a) AL= 00000100, CF=1 b) BL=00000100, CF=0 c) AL=11111100 CF=1 d) BL= 00000100, CF=1

Description : What is the output of the following code AL=00110101 BL= 39H M. Krishna Kumar/IISc. Bangalore M2/V1/June 04/1 Microprocessors and Microcontrollers/Assembly language of 8086 Multiple Choice Questions SUB AL, BL AAS ... , CF=1 b) BL=00000100, CF=0 c) AL=11111100 CF=1 d) BL= 00000100, CF=1

Last Answer : b) BL=00000100, CF=0

In an 8085 microprocessor, the instruction CMP B has been executed while the contentsof accumulator is less than that of register B. As a result carry flag and zero flag will berespectively (A) set, reset (B) reset, set (C) reset, reset (D) set, set

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Last Answer : (A) set, reset

A CPU handles interrupt by executing interrupt service subroutine................. (A) by checking interrupt register after execution of each instruction (B) by checking interrupt register at the end of the fetch cycle (C) whenever an interrupt is registered (D) by checking interrupt register at regular time interval

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What will be the hexadecimal value in the register ax (32-bit) after executing the following instructions? Mov al, 15 Mov ah, 15 Xor al, al Mov cl, 3 Shr ax, cl Codes: (A) 0F00 h (B) 0F0F h (C) 01E0 h (D) FFFF h

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Last Answer : (C) 01E0 h

The RST 7 instruction in 8085 microprocessor is equivalent to: (A) CALL 0010 H (B) CALL 0034 H (C) CALL 0038 H (D) CALL 003C H

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Last Answer : (C) CALL 0038 H

Which flag does not change by the execution of the instruction DCR B in 8085 microprocessor ?

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Last Answer : Which flag does not change by the execution of the instruction DCR B in 8085 microprocessor ?  (a) Parity (b) Carry (c) Zero (d) Sign

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Last Answer : b) SF=0

The ............... addressing mode is similar to register indirect addressing mode, except that an offset is added to the contents of the register. The offset and register are specified in the instruction. (A) Base indexed (B) Base indexed plus displacement (C) Indexed (D) Displacement

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The content of the accumulator after the execution of the following 8085 assembly language program, is: MVI A, 42H MVI B, 05H UGC: ADD B DCR B JNZ UGC ADI 25H HLT (A) 82 H (B) 78 H (C) 76 H (D) 47 H

Description : The content of the accumulator after the execution of the following 8085 assembly language program, is: MVI A, 42H  MVI B, 05H UGC: ADD B DCR B JNZ UGC ADI 25H HLT (A) 82 H (B) 78 H (C) 76 H (D) 47 H

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The content of the accumulator after the execution of the following 8085 assembly language program, is MVI A, 35H MOV B, A STC CMC RAR XRA B (A) 00H (B) 35H (C) EFH (D) 2FH

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Last Answer : (D) 2FH

In an 8085 microprocessor, the contents of the Accumulator, after the following instructions are executed

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Last Answer : In an 8085 microprocessor, the contents of the Accumulator, after the following instructions are executed will become   XRA A   MVI B, F0 H   SUB B  (A) 01 H (B) 0F H (C) F0 H (D) 10 H

In an 8085 microprocessor, the contents of accumulator, after the following instructions are

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A single instruction to clear the lower four bits of the accumulator I 8085 assembly language is:

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Last Answer : g. All of these

In an 8085 microprocessor, after the execution of XRA A instruction

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Last Answer :  is possible only when the register is an accumulator or instruction register

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Last Answer : (C) Interrupt request register

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Last Answer : The SF is called as sign flag

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Last Answer : c. A and B

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Description : A DMA controller transfers 32-bit words to memory using cycle Stealing. The words are assembled from a device that transmits characters at a rate of 4800 characters per second. The CPU is fetching and executing instructions at an average ... of the DMA transfer? (A) 0.06% (B) 0.12% (C) 1.2% (D) 2.5%

Last Answer : Answer: B