Which Bus connects CPU & level 2 cache:
a. Rear side bus
b. Front side bus
c. Memory side bus
d. None of these

1 Answer

Answer :

b. Front side bus

Related questions

Description : A bus that connects a computer to Peripheral devices is called _______ A. System Bus B. Memory Bus C. Front-Side Bus D. External Bus

Last Answer : D. External Bus

Description : Which is the components of computer: a. System Bus b. CPU c. Memory Unit d. All of these

Last Answer : d. All of these

Description : Which of the following are the two main components of the CPU? a. Control unit and registers b. Registers and main memory c. Control Unit and ALU d. ALU and bus

Last Answer : c. Control Unit and ALU

Description : The lower red curvy arrow show that CPU places the address extracted from the memory location on the_____: a. Address bus b. System bus c. Control bus d. Data bus

Last Answer : a. Address bus

Description : Which bus connects all the internal components of a computer such as CPU and memory to the main board(motherboard)? A. Expansion Bus B. External Bus C. Internal Bus D. None of the Above

Last Answer : C. Internal Bus

Description : CPU can read & write data by using : a. Control bus b. Data bus c. Address bus d. None of these

Last Answer : b. Data bus

Description : L2 cache memory is places at ______ a. On Processor b. On Mother Board c. On Memory d. All of these

Last Answer : b. On Mother Board

Description : L1 cache memory is places at ______ a. On Processor b. On Mother Board c. On Memory d. All of these

Last Answer : a. On Processor

Description : ___ memory system which is discussed later can improve matters in this respect: a. Data memory b. Cache memory c. Memory d. None of these

Last Answer : b. Cache memory

Description : Which of the following memories has the shortest access times? a. Cache memory b. Magnetic bubble memory c. Magnetic core memory d. RAM

Last Answer : a. Cache memory

Description : The ALU of a computer responds to the commands coming from a. Primary memory b. Control section c. External memory d. Cache memory

Last Answer : b. Control section

Description : A microprocessor retries instructions from : a. Control memory b. Cache memory c. Main memory d. Virtual memory

Last Answer : c. Main memory

Description : The ________ ensures that only one IC is active at a time to avoid a bus conflict caused by two ICs writing different data to the same bus.A.control busB.control instructionsC. address decoder D.CPU

Last Answer : C. address decoder

Description : The CPU completes yields control of the bus to the DMA controller via: a. DMA acknowledge signal b. DMA integrated signal c. DMA implicitly signal d. None of these

Last Answer : a. DMA acknowledge signal

Description : The ____ place the data from a register onto the data bus: a. CPU b. ALU c. Both A and B d. None of these

Last Answer : a. CPU

Description : The CPU sends out a ____ signal to indicate that valid data is available on the data bus: a. Read b. Write c. Both A and B

Last Answer : b. Write

Description : The information on the data bus is transferred to the ______register: a. MOC b. MDR c. VAM d. CPU

Last Answer : b. MDR

Description : Which bus transfer singles from the CPU to external device and others that carry singles from external device to the CPU: a. Control bus b. Data bus c. Address bus d. None of these

Last Answer : a. Control bus

Description : Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these

Last Answer : b. Cache memory

Description : Pentium Pro Processor contains: a. L1 Cache b. L2 Cache c. Both L1 & L2 d. None of these

Last Answer : c. Both L1 & L2

Description : Which process information at a much faster rate than it can retrieve it from memory: a. ALU b. Processor c. Microprocessor d. CPU

Last Answer : d. CPU

Description : In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack

Last Answer : b. after OP code in the instruction

Description : Where does a computer add and compare data? a. Hard disk b. Floppy disk c. CPU chip d. Memory chip

Last Answer : c. CPU chip

Description : Which computer memory is used for storing programs and data currently being processed by the CPU? a. Mass memory b. Internal memory c. Non-volatile memory d. PROM

Last Answer : b. Internal memory

Description : What type of memory is not directly addressable by the CPU and requires special softw3are called EMS (expanded memory specification)? a. Extended b. Expanded c. Base d. Conventional

Last Answer : b. Expanded

Description : The brain of any computer system is a. ALU b. Memory c. CPU d. Control unit

Last Answer : c. CPU

Description : . An online backing storage system capable of storing larger quantities of data is a. CPU b. Memory c. Mass storage d. Secondary storage

Last Answer : c. Mass storage

Description : Interface electronic circuit is used to interconnect I/O devices to a computer’s CPU or a. ALU b. Memory c. Buffer d. Register

Last Answer : b. Memory

Description : The use of spooler programs and/or …. Hardware allows personal computer operators to do the processing work at the same time a printing operation is in progress a. Registered mails b. Memory c. CPU d. Buffer

Last Answer : d. Buffer

Description : A/n …. Device is any device that provides information, which is sent to the CPU a. Input b. Output c. CPU d. Memory

Last Answer : a. Input

Description : A directly accessible appointment calendar is feature of a … resident package a. CPU b. Memory c. Buffer d. ALU

Last Answer : b. Memory

Description : In most IBM PCs, the CPU, the device drives, memory expansion slots and active components are mounted on a single board. What is the name of this board? a. Motherboard b. Breadboard c. Daughter board d. Grandmother board

Last Answer : a. Motherboard

Description : The CPU removes the ___ signal to complete the memory write operation: a. Read b. Write c. Both A and B d. None of these

Last Answer : a. Read

Description : The upper red arrow show that CPU sends out the control signals____ and _____ indicate the data is read from the memory: a. Memory request b. Read c. Both A and B d. None of these

Last Answer : c. Both A and B

Description : ___________ is a very high speed memory placed in between RAM and CPU. A. Magnetic disk B. Magnetic drum C. Virtual memory D. Cache memory

Last Answer : D. Cache memory

Description : Cache memory is located between main memory and : a. CPU b. Memory c. Botha &b d. None of these

Last Answer : a. CPU

Description : Which memory is used to copy instructions or data currently used by CPU: a. Main memory b. Secondary memory c. Cache memory d. None of these

Last Answer : c. Cache memory

Description : What are 2 advantages of cache memory: a. Reduction of average access time for CPU memory b. Reduction of bandwidth of available memory of CPU c. Botha&b d. None of these

Last Answer : c. Botha&b

Description : function select takes op code in IR translating to function of ALU and it may be compact binary code or one line per ALU: a ALU b CPU c. Memory d. Cache

Last Answer : a ALU

Description : Which is very high speed semiconductor memory which can speed up CPU: a) Secondary Memory b) Cache Memory c) Primary Memory d) None of These

Last Answer : b) Cache Memory

Description : Which of the following correctly lists computer memory types from highest to lowest speed? (A) Secondary Storage: Main Memory (RAM); Cache. Memory; CPU Registers (B) CPU Registers; Cache Memory; ... (RAM); Secondary Storage (D) Cache Memory; CPU Registers; Main Memory (RAM); Secondary Storage

Last Answer : Answer: C (CPU Registers > Cache Memory > Main Memory (RAM) > Secondary Storage)

Description : Cache memory acts between (1) CPU and RAM (2) CPU and ROM (3) RAM and ROM (4) CPU and Hard disk

Last Answer : CPU and RAM 

Description : A 32-bit address bus allows access to a memory of capacity(a) 64 Mb (b) 16 Mb (c) 1Gb (d) 4 Gb 2.Which processor structure is pipelined? a) all x80 processors b) all x85 processors c) all x86 processors

Last Answer : c) all x86 processors

Description : A physical connection between the microprocessor memory and other parts of the m9crocomputer is known as a. Path b. Address bus c. Route d. All of the above

Last Answer : b. Address bus

Description : Which register is connected to the memory by way of the address bus: a. MAR b. MDR c. SAM d. None of these

Last Answer : a. MAR

Description : The network of wires or electronic path ways on mother board back side: a. PCB b. BUS c. BOTH A and B d. None of these

Last Answer : c. BOTH A and B

Description : The fetch-execute cycle is to use a system know as: a. Assembly line b. Pipelining c. Cache d. None of these

Last Answer : b. Pipelining

Description : ____is used to control the cache with two new control bits not present in the 80386 microprocessor. What are the bits used to control the 8K byte cache? a) CR0, CD, NW b) CR0, NW, PWT c) Control Register Zero, PWT, PCD d) none

Last Answer : d) none

Description : External Bus is also referred as _________ A. System Bus B. Memory Bus C. Front-Side Bus D. Expansion Bus

Last Answer : D. Expansion Bus

Description : The problem of bus confect and sparse address distribution are eliminated by the use of ______ address technique: a. Fully decoding b. Half decoding c. Both a & b d. None of these

Last Answer : a. Fully decoding