The lower red curvy arrow show that CPU places the address extracted from  the memory location on the_____:
a. Address bus
b. System bus
c. Control bus
d. Data bus

1 Answer

Answer :

a. Address bus

Related questions

Description : The upper red arrow show that CPU sends out the control signals____ and _____ indicate the data is read from the memory: a. Memory request b. Read c. Both A and B d. None of these

Last Answer : c. Both A and B

Description : The ________ ensures that only one IC is active at a time to avoid a bus conflict caused by two ICs writing different data to the same bus.A.control busB.control instructionsC. address decoder D.CPU

Last Answer : C. address decoder

Description : Which bus transfer singles from the CPU to external device and others that carry singles from external device to the CPU: a. Control bus b. Data bus c. Address bus d. None of these

Last Answer : a. Control bus

Description : CPU can read & write data by using : a. Control bus b. Data bus c. Address bus d. None of these

Last Answer : b. Data bus

Description : The information is transferred from the_____ and ____ specified register: a. MDR b. CPU c. Both A and B

Last Answer : c. Both A and B

Description : Which of the following are the two main components of the CPU? a. Control unit and registers b. Registers and main memory c. Control Unit and ALU d. ALU and bus

Last Answer : c. Control Unit and ALU

Description : Which is the components of computer: a. System Bus b. CPU c. Memory Unit d. All of these

Last Answer : d. All of these

Description : Which Bus connects CPU & level 2 cache: a. Rear side bus b. Front side bus c. Memory side bus d. None of these

Last Answer : b. Front side bus

Description : In memory transfer location address is supplied by that puts this on address bus. a. ALU b. CPU Cc. MAR d. MDR

Last Answer : b. CPU

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory Address Register b. Memory Data Register c. Instruction Register d. Program Register

Last Answer : d. Program Register

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Last Answer : d. Program counter

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address register b. Memory data register c. Instruction registers d. Program counter

Last Answer : c. Instruction registers

Description : Which of the following will happen when data is entered into a memory location? a. It will add to the content of the location b. It will change the address of the memory location c. It will erase the previous content d. It will not be fruitful if there is already some data at the location

Last Answer : c. It will erase the previous content

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Last Answer : d. Program counter

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address registers b. Memory data registers c. Instruction register d. Program counter

Last Answer : c. Instruction register

Description : System Bus Contains: a. Address Bus b. Data Bus c. Control Bus d. All of these

Last Answer : d. All of these

Description : Which bus carry addresses: a. System bus b. Address bus c. Control bus d. Data bus

Last Answer : b. Address bus

Description : The CPU completes yields control of the bus to the DMA controller via: a. DMA acknowledge signal b. DMA integrated signal c. DMA implicitly signal d. None of these

Last Answer : a. DMA acknowledge signal

Description : The ____ place the data from a register onto the data bus: a. CPU b. ALU c. Both A and B d. None of these

Last Answer : a. CPU

Description : The CPU sends out a ____ signal to indicate that valid data is available on the data bus: a. Read b. Write c. Both A and B

Last Answer : b. Write

Description : The information on the data bus is transferred to the ______register: a. MOC b. MDR c. VAM d. CPU

Last Answer : b. MDR

Description : A 32-bit address bus allows access to a memory of capacity(a) 64 Mb (b) 16 Mb (c) 1Gb (d) 4 Gb 2.Which processor structure is pipelined? a) all x80 processors b) all x85 processors c) all x86 processors

Last Answer : c) all x86 processors

Description : A physical connection between the microprocessor memory and other parts of the m9crocomputer is known as a. Path b. Address bus c. Route d. All of the above

Last Answer : b. Address bus

Description : Which register is connected to the memory by way of the address bus: a. MAR b. MDR c. SAM d. None of these

Last Answer : a. MAR

Description : The brain of any computer system is a. ALU b. Memory c. CPU d. Control unit

Last Answer : c. CPU

Description : . An online backing storage system capable of storing larger quantities of data is a. CPU b. Memory c. Mass storage d. Secondary storage

Last Answer : c. Mass storage

Description : A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored

Last Answer : a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory.

Description : How many address lines are needed to address each memory location in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12

Last Answer : b. 11

Description : how many address lines are needed to address each machine location in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12

Last Answer : b. 11

Description : Each memory location has: a. Address b. Contents c. Both A and B d. None of these

Last Answer : c. Both A and B

Description : The fourth generation of microprocessor came really as a soon boon to the_____: a. Computing environment b. Processing environment c. Hot environment d. All of these

Last Answer : a. Computing environment

Description : Which bus plays a crucial role in I/O: a. System bus b. Control bus c. Address bus d. Both A and B

Last Answer : b. Control bus

Description : Where does a computer add and compare data? a. Hard disk b. Floppy disk c. CPU chip d. Memory chip

Last Answer : c. CPU chip

Description : Which computer memory is used for storing programs and data currently being processed by the CPU? a. Mass memory b. Internal memory c. Non-volatile memory d. PROM

Last Answer : b. Internal memory

Description : In 8096, CCB bit 3 is ____. a) write strobe mode select b) address valid strobe select c) bus width select d) Internal read control mode

Last Answer : c) bus width select

Description : In 8096, CCB bit 3 is ____. a) write strobe mode select b) address valid strobe select c) bus width select d) Internal read control mode

Last Answer : b) address valid strobe select

Description : What does microprocessor speed depends on? a) Clock b) Data bus width c) Address bus width

Last Answer : c) Address bus width

Description : A type of core store that has a lower access time than the devices used for working store in the same processor is known as a. Core memory b. Buffer c. Fast core d. Address register

Last Answer : d. Address register

Description : What is the control unit's function in the CPU? a. To transfer data to primary storage b. to store program instruction c. to perform logic operations d. to decode program instruction

Last Answer : b. to store program instruction

Description : When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is ... two data bytes stored in the top two locations of the stack are transferred to the stack pointer

Last Answer : c. two data bytes stored in the top two locations of the stack are transferred to the program counter

Description : A storage area used to store data to a compensate for the difference in speed at which the different units can handle data is a. Memory b. Buffer c. Accumulator d. Address

Last Answer : b. Buffer

Description : Which process information at a much faster rate than it can retrieve it from memory: a. ALU b. Processor c. Microprocessor d. CPU

Last Answer : d. CPU

Description : In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack

Last Answer : b. after OP code in the instruction

Description : What type of memory is not directly addressable by the CPU and requires special softw3are called EMS (expanded memory specification)? a. Extended b. Expanded c. Base d. Conventional

Last Answer : b. Expanded

Description : Interface electronic circuit is used to interconnect I/O devices to a computer’s CPU or a. ALU b. Memory c. Buffer d. Register

Last Answer : b. Memory

Description : The use of spooler programs and/or …. Hardware allows personal computer operators to do the processing work at the same time a printing operation is in progress a. Registered mails b. Memory c. CPU d. Buffer

Last Answer : d. Buffer

Description : A/n …. Device is any device that provides information, which is sent to the CPU a. Input b. Output c. CPU d. Memory

Last Answer : a. Input

Description : A directly accessible appointment calendar is feature of a … resident package a. CPU b. Memory c. Buffer d. ALU

Last Answer : b. Memory

Description : In most IBM PCs, the CPU, the device drives, memory expansion slots and active components are mounted on a single board. What is the name of this board? a. Motherboard b. Breadboard c. Daughter board d. Grandmother board

Last Answer : a. Motherboard

Description : The CPU removes the ___ signal to complete the memory write operation: a. Read b. Write c. Both A and B d. None of these

Last Answer : a. Read