Description : Which storage technique dose not decoding circuit: a. Linear decoding b. Fully decoding c. Partially d. None of these
Last Answer : a. Linear decoding
Description : The problem of bus confect and sparse address distribution are eliminated by the use of ______ address technique: a. Fully decoding b. Half decoding c. Both a & b d. None of these
Last Answer : a. Fully decoding
Description : Which statement is wrong according to linear decoding : a. Address map is not contiguous. b. Confects occur if two of the select lines become active at the same time c. If all unused address lines are not used as chip selectors then these unused lines become don’t cares d. None of these
Last Answer : d. None of these
Description : In linear decoding address bus of 16-bit wide can connect only ____ of RAM. a. 16 KB b. 6KB c. 12KB d. 64KB
Last Answer : b. 6KB
Description : Pipelining strategy is called implement a. instruction execution b. instruction prefetch c. instruction decoding d. instruction manipulation
Last Answer : b. instruction prefetch
Description : The work of EU is ________ A. encoding B. decoding C. processing D. calculations
Last Answer : The work of EU is decoding
Description : VGA stands for: a. Visual graph area b. Visual graphics array c. Visual graph accept d. All of these
Last Answer : b. Visual graphics array
Description : WAN stands for a. Wap Area Network b. Wide Area Network c. Wide Array Net d. Wireless Area Network
Last Answer : b. Wide Area Network
Description : VGA is a. Video Graphics Array b. Visual Graphics Array c. Volatile Graphics Array d. Video Graphics Adapter
Last Answer : a. Video Graphics Array
Description : ALU is a. Arithmetic Logic Unit b. Array Logic Unit c. Application Logic Unit d. None of above
Last Answer : a. Arithmetic Logic Unit
Description : UNIVAC is a. Universal Automatic Computer b. Universal Array Computer c. Unique Automatic Computer d. Unvalued Automatic Computer
Last Answer : a. Universal Automatic Computer
Description : Which is not the main architectural feature of Power PC: a. It is not based on RISC b. Superscalar implementation c. Both 32 & 64 Bit d. Paged Memory management architecture
Last Answer : a. It is not based on RISC
Description : Which of the following memory medium is not used as main memory system? a. Magnetic core b. Semiconductor c. Magnetic tape d. Both a and b
Last Answer : c. Magnetic tape
Description : What is the main problem of Intel 4004 microprocessor: a. Speed b. Memory size c. World width d. All of these
Last Answer : d. All of these
Description : Which is the parts of memory unit: a. Processor memory b. Main memory c. Secondary memory d. All of these
Description : Which of the following terms is the most closely related to main memory? a. Non volatile b. Permanent c. Control unit d. Temporary
Last Answer : d. Temporary
Description : The two kinds of main memory are: a. Primary and secondary b. Random and sequential c. ROM and RAM d. All of above
Last Answer : c. ROM and RAM
Description : Which of the following are the two main components of the CPU? a. Control unit and registers b. Registers and main memory c. Control Unit and ALU d. ALU and bus
Last Answer : c. Control Unit and ALU
Description : A microprocessor retries instructions from : a. Control memory b. Cache memory c. Main memory d. Virtual memory
Last Answer : c. Main memory
Description : The register section is related to______ of the computer: a. Processing b. ALU c. Main memory d. None of these
Description : A technique used by codes to convert an analog signal into a digital bit stream is known as a. Pulse code modulation b. Pulse stretcher c. Query processing d. Queue management
Last Answer : a. Pulse code modulation
Description : PMOS stands for: a. P-channel metal-oxide-semiconductor b. P-channel memory –oxide-semiconductor c. Both A and B d. None of these
Last Answer : a. P-channel metal-oxide-semiconductor
Description : The two major types of computer chips are a. External memory chip b. Primary memory chip c. Microprocessor chip d. Both b and c
Last Answer : d. Both b and c
Description : What does the disk drive of a computer do? a. Rotate the disk b. Read the disk c. Load a program from the disk into the memory d. Both b and c
Description : The CPU removes the ___ signal to complete the memory write operation: a. Read b. Write c. Both A and B d. None of these
Last Answer : a. Read
Description : DMA stands for: a. Dynamic memory access b. Data memory access c. Direct memory access d. Both B and C
Last Answer : d. Both B and C
Description : The upper red arrow show that CPU sends out the control signals____ and _____ indicate the data is read from the memory: a. Memory request b. Read c. Both A and B d. None of these
Last Answer : c. Both A and B
Description : Which register is used to communicate with memory: a. MAR b. MDR c. Both A and B d. None of these
Description : Secondary memory is also called____: a. Auxiliary b. Backup store c. Both A and B d. None of these
Description : Each memory location has: a. Address b. Contents c. Both A and B d. None of these
Description : CAD stands for a. Computer aided design b. Computer algorithm for design c. Computer application in design d. All of the above
Last Answer : a. Computer aided design
Description : Personnel who design, program, operate and maintain computer equipment refers to a. Console-operator b. Programmer c. Peopleware d. System Analyst
Last Answer : c. Peopleware
Description : Basic concepts in memory interfacing
Last Answer : The primary function of memory interfacing is that the microprocessor should be able to read from and write into a given register of a memory chip. To perform these operations the microprocessor ... Be able to select the chip Identify the register Enable the appropriate buffer
Description : Pentium Pro can address _____ of memory: a. 4 GB b. 128 GB c. 256 GB d. 512 GB
Last Answer : a. 4 GB
Description : L2 cache memory is places at ______ a. On Processor b. On Mother Board c. On Memory d. All of these
Last Answer : b. On Mother Board
Description : L1 cache memory is places at ______ a. On Processor b. On Mother Board c. On Memory d. All of these
Last Answer : a. On Processor
Description : Which processor provided 1 MB memory: a. 16-bit 8086 and 8088 b. 32-bit 8086 and 8088 c. 64-bit 8086 and 8088 d. 8-bit 8086 and 8088
Last Answer : a. 16-bit 8086 and 8088
Description : ___ memory system which is discussed later can improve matters in this respect: a. Data memory b. Cache memory c. Memory d. None of these
Last Answer : b. Cache memory
Description : Which process information at a much faster rate than it can retrieve it from memory: a. ALU b. Processor c. Microprocessor d. CPU
Last Answer : d. CPU
Description : NMOS stands for: a. N-channel metal-oxide-semiconductor b. P-channel metal-oxide-semiconductor c. N-channel memory-oxide-semiconductor d. All the above
Last Answer : a. N-channel metal-oxide-semiconductor
Description : MOS stand for: a. Metal oxide semiconductor b. Memory oxide semiconductor c. A and B d. None of these
Last Answer : a. Metal oxide semiconductor
Description : How many group of memory unit: a. Four b. Three c. Two d. One
Last Answer : b. Three
Description : Which is an integral part of any microcomputer system and its primary purpose is to hold program and data: a. Memory unit b. Register unit c. A and B d. None of these
Last Answer : a. Memory unit
Description : Which is the components of computer: a. System Bus b. CPU c. Memory Unit d. All of these
Description : When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is ... two data bytes stored in the top two locations of the stack are transferred to the stack pointer
Last Answer : c. two data bytes stored in the top two locations of the stack are transferred to the program counter
Description : In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack
Last Answer : b. after OP code in the instruction
Description : How many address lines are needed to address each memory locations in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12
Last Answer : b. 11
Description : Memory access in RISC architecture is limited to instructions a. CALL and RET b. PUSH and POP c. STA and LDA d. MOV and JMP
Last Answer : c. STA and LDA
Description : A time sharing system imply a. more than one processor in the system b. more than one program in memory c. more than one memory in the system d. None of above
Last Answer : b. more than one program in memory
Description : A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored
Last Answer : a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory.