Each memory location has:
a. Address
b. Contents
c. Both A and B
d. None of these

1 Answer

Answer :

c. Both A and B

Related questions

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address register b. Memory data register c. Instruction registers d. Program counter

Last Answer : c. Instruction registers

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address registers b. Memory data registers c. Instruction register d. Program counter

Last Answer : c. Instruction register

Description : How many address lines are needed to address each memory location in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12

Last Answer : b. 11

Description : how many address lines are needed to address each machine location in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12

Last Answer : b. 11

Description : A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored

Last Answer : a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory.

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory Address Register b. Memory Data Register c. Instruction Register d. Program Register

Last Answer : d. Program Register

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Last Answer : d. Program counter

Description : Which of the following will happen when data is entered into a memory location? a. It will add to the content of the location b. It will change the address of the memory location c. It will erase the previous content d. It will not be fruitful if there is already some data at the location

Last Answer : c. It will erase the previous content

Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter

Last Answer : d. Program counter

Description : The lower red curvy arrow show that CPU places the address extracted from the memory location on the_____: a. Address bus b. System bus c. Control bus d. Data bus

Last Answer : a. Address bus

Description : Which of the following is form of semi conductor memory in which it is possible to change the contents of selected memory locations by applying suitable electrical signals? a. CAM b. ROM c. EPROM d. Abacus

Last Answer : c. EPROM

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? A) Memory address registers B) Memory data registers C) Instruction register D) Program counter

Last Answer : Answer : C

Description : In post-indexing the contents of the address field are used to access a memory location containing a___ address: Immediate addressing Direct addressing Register addressing ao | None of these

Last Answer : Direct addressing

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address registers b. Memory data registers c. Instruction register d. Program counter

Last Answer : Instruction register

Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address register b. Memory data register c. Instruction registers d. Program counter

Last Answer : c. Instruction registers

Description : Because we wish to allow each ASCII code to occupy one location in memory, most memories are _____ addressable. a. BYTE b. NIBBLE c. WORD (16 bits) d. DOUBLEWORD (32 bits)

Last Answer : a. BYTE

Description : How many address lines are needed to address each memory locations in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12

Last Answer : b. 11

Description : Microprocessor 8085 can address location upto a. 32K b. 128K c. 64K d. 1M

Last Answer : c. 64K

Description : A name or number used to identify a storage location is called a. A byte b. A record c. An address d. All of above

Last Answer : c. An address

Description : A name or number used to identify a storage location devices? a. A byte b. A record c. An address d. All of above

Last Answer : c. An address

Description : Pentium Pro can address _____ of memory: a. 4 GB b. 128 GB c. 256 GB d. 512 GB

Last Answer : a. 4 GB

Description : When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is ... two data bytes stored in the top two locations of the stack are transferred to the stack pointer

Last Answer : c. two data bytes stored in the top two locations of the stack are transferred to the program counter

Description : If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) a. doubles b. remains unchanged c. halves d. increases by 2^(address bits)/addressability

Last Answer : c. halves

Description : For a memory with a 16-bit address space, the addressability is a. 16 bits b. 8 bits c. 2^16 bits d. Cannot be determined

Last Answer : d. Cannot be determined

Description : A 32-bit address bus allows access to a memory of capacity(a) 64 Mb (b) 16 Mb (c) 1Gb (d) 4 Gb 2.Which processor structure is pipelined? a) all x80 processors b) all x85 processors c) all x86 processors

Last Answer : c) all x86 processors

Description : Registers, which are partially visible to users and used to hold conditional, are known as a. PC b. Memory address registers c. General purpose register d. Flags

Last Answer : c. General purpose register

Description : A physical connection between the microprocessor memory and other parts of the m9crocomputer is known as a. Path b. Address bus c. Route d. All of the above

Last Answer : b. Address bus

Description : A memory that is capable of determining whether a given datum is contained in one of its address is a. ROM b. PROM c. CAM d. RAM

Last Answer : c. CAM

Description : A type of core store that has a lower access time than the devices used for working store in the same processor is known as a. Core memory b. Buffer c. Fast core d. Address register

Last Answer : d. Address register

Description : A storage area used to store data to a compensate for the difference in speed at which the different units can handle data is a. Memory b. Buffer c. Accumulator d. Address

Last Answer : b. Buffer

Description : Instructions and memory address are represented by a. Character code b. Binary codes c. Binary word d. Parity bit

Last Answer : b. Binary codes

Description : Which register is connected to the memory by way of the address bus: a. MAR b. MDR c. SAM d. None of these

Last Answer : a. MAR

Description : VAM stands for: a. Valid memory address b. Virtual memory address c. Variable memory address d. None of these

Last Answer : a. Valid memory address

Description : MAR stands for: a. Memory address register b. Memory address recode c. Micro address register d. None of these

Last Answer : a. Memory address register

Description : ____ causes the address of the next microprocessor to be obtained from the memory: a. CRJA b. ROM c. MAP d. HLT

Last Answer : c. MAP

Description : 8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH 17. If the __ pin is ___ , then we have the option ... b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal

Last Answer : c) EA, high, external, internal

Description : 8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH

Last Answer : c) 2000 to 3FFFH

Description : The advantage of memory mapped I/O over I/O mapped I/O is, a) Faster b) Many instructions supporting memory mapped I/O c) Require a bigger address decoder d) All the above

Last Answer : d) All the above

Description : The contents of accumulator before CMA instruction is A5H. Its content after instructionexecution isa) A5H b) 5AH

Last Answer : b) 5AH

Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine

Last Answer : d. Executable, Stack and Subroutine

Description : The average time required to reach a storage location in memory and obtain its contents is called_____. A. Latency time. B. Access time. C. Turnaround time. D. Response time.

Last Answer : B. Access time.

Description : The average time required to reach a storage location in the memory to read or retrieve the contents of memory is called as A) Turnaround time B) Latency time C) Access time D) Response time

Last Answer : The average time required to reach a storage location in the memory to read or retrieve the contents of memory is called as Access time

Description : The contents of information are stored in A) Memory data register B) Memory address register C) Memory arithmetic registers D) Memory access register

Last Answer : Answer : A

Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read

Last Answer : d. Address register and read

Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next

Last Answer : c. Instruction register, incremented and next

Description : The contents of information are stored in _______: a) Memory Data Register b) Memory Address Register c) Memory Access Register d) Memory Arithmetic Register e) None of The Above

Last Answer : a) Memory Data Register

Description : The contents of information are stored in --- 1) Memory data register 2) Memory address register 3) Memory access register 4) Memory arithmetic register

Last Answer : 1) Memory data register

Description : Which bus plays a crucial role in I/O: a. System bus b. Control bus c. Address bus d. Both A and B

Last Answer : b. Control bus

Description : The problem of bus confect and sparse address distribution are eliminated by the use of ______ address technique: a. Fully decoding b. Half decoding c. Both a & b d. None of these

Last Answer : a. Fully decoding

Description : How many address lines are needed to address each machine location in a 2048 x 4 memory chip? A) 10 B) 11 C) 8 D) 12

Last Answer : Answer : B