A half adder can be constructed from

A half adder can be constructed from
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A half adder can be constructed from One XOR gate and one 'AND‘ gate with their input connected in parallel


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Define Half adder and full adder

Description : Define Half adder and full adder

Last Answer : The logic circuit that performs the addition of two bits is a half adder. The circuit that performs the addition of three bits is a full adder.

. What will be the output of a half adder when both inputs are 1s?

Description : . What will be the output of a half adder when both inputs are 1s?

Last Answer : Sum equals 0 with a carry of 1.

What advantage does a half adder have over a quarter adder?

Description : What advantage does a half adder have over a quarter adder?

Last Answer : The half adder generates a carry.

Define half adder and full adder

Description : Define half adder and full adder

Last Answer : The logic circuit that performs the addition of two bits is a half adder. The circuit that performs the addition of three bits is a full adder.

The gates required to build a half adder are (A) EX-OR gate and NOR gate (B) EX-OR gate and OR gate (C) EX-OR gate and AND gate (D) Four NAND gates.

Description : The gates required to build a half adder are (A) EX-OR gate and NOR gate (B) EX-OR gate and OR gate (C) EX-OR gate and AND gate (D) Four NAND gates.

Last Answer : (C) EX-OR gate and AND gate

The BCD adder to add two decimal digits needs minimum of (A) 6 full adders and 2 half adders (B) 5 full adders and 3 half adders (C) 4 full adders and 3 half adders (D) 5 full adders and 2 half adders

Description : The BCD adder to add two decimal digits needs minimum of (A) 6 full adders and 2 half adders (B) 5 full adders and 3 half adders (C) 4 full adders and 3 half adders (D) 5 full adders and 2 half adders

Last Answer : (D) 5 full adders and 2 half adders

What is an adder ?

Description : What is an adder ?

Last Answer : The cooperative circuit with which the addition is done is called adder.

Are adder omnivore?

Description : Are adder omnivore?

Last Answer : The one native poisonous British snake is the Common European viper (Vipera berus). Commonly known in Britain as the Adder, it is a carnivore.

What category are cobra lizard adder and copra called?

Description : What category are cobra lizard adder and copra called?

Last Answer : Feel Free to Answer

Data transfers are done using: a. Multiplexer switching b. Demultiplexer switching c. Adder switching d. Subtractor switching

Description : Data transfers are done using: a. Multiplexer switching b. Demultiplexer switching c. Adder switching d. Subtractor switching

Last Answer : a. Multiplexer switching

In RISC architecture access to registers is made as a block and register file in a particular register can be selected by using: a. Multiplexer b. Decoder c. Subtractor d. Adder

Description : In RISC architecture access to registers is made as a block and register file in a particular register can be selected by using: a. Multiplexer b. Decoder c. Subtractor d. Adder

Last Answer : b. Decoder

What type of logic gates are added to a parallel adder to enable it to subtract?

Description : What type of logic gates are added to a parallel adder to enable it to subtract?

Last Answer : X-OR gates.

What type of adder is used to handle a carry from a previous circuit?

Description : What type of adder is used to handle a carry from a previous circuit?

Last Answer : Full adder.

An X-OR gate may be used as what type of adder?

Description : An X-OR gate may be used as what type of adder?

Last Answer : Quarter adder.

What is the difference between a summing amplifier and an adder circuit?

Description : What is the difference between a summing amplifier and an adder circuit?

Last Answer : The adder simply adds the input signals together while the summing amplifier multiplies the sum of the input signals by the gain of circuit.

Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier. a. Circuit A has more gates than circuit B b. Circuit B has more gates than circuit A c. Circuit A has the same number of gates as circuit B

Description : Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier. a. Circuit A has more gates than circuit B b. Circuit B has more gates than circuit A c. Circuit A has the same number of gates as circuit B

Last Answer : a. Circuit A has more gates than circuit

What is a carry look-ahead adder?

Description : What is a carry look-ahead adder?

Last Answer : The input carry needed by a stage is directly computed from carry signals obtained from all the preceding stages i-1,i-2,.....0, rather than waiting for normal carries to supply slowly from stage to stage. An adder that uses this principle is a called carry look-ahead adder.

A full adder logic circuit will have (A) Two inputs and one output. (B) Three inputs and three outputs. (C) Two inputs and two outputs. (D) Three inputs and two outputs.

Description : A full adder logic circuit will have (A) Two inputs and one output. (B) Three inputs and three outputs. (C) Two inputs and two outputs. (D) Three inputs and two outputs.

Last Answer : Ans: D A full adder circuit will add two bits and it will also accounts the carry input generated in the previous stage. Thus three inputs and two outputs (Sum and Carry) are there.

The correction to be applied in decimal adder to the generated sum is (A) 00101 (B) 00110 (C) 01101 (D) 01010

Description : The correction to be applied in decimal adder to the generated sum is (A) 00101 (B) 00110 (C) 01101 (D) 01010

Last Answer : Ans: B The correction to be applied in decimal adder to the generated sum is 00110. When the four bit sum is more than 9 then the sum is invalid. In such cases, add +6(i.e. 0110) to the ... the six invalid states. If a carry is generated when adding 6, add the carry to the next four bit group .

The size of the ROM required to build an 8-bit adder/subtractor with mode control, carry input, carry output and two’s complement overflow output is given as

Description : The size of the ROM required to build an 8-bit adder/subtractor with mode control, carry input, carry output and two’s complement overflow output is given as

Last Answer : (B) 218 × 10

Consider a full-adder with the following input values: (a) x=1, y=0 and Ci(carry input) = 0 (b) x=0, y=1 and Ci = 1 Compute the values of S(sum) and C0 (carry output) for the above input values. (A) S=1 , C0= 0 and S=0 , C0= 1 (B) S=0 , C0= 0 and S=1 , C0= 1 (C) S=1 , C0= 1 and S=0 , C0= 0 (D) S=0 , C0= 1 and S=1 , C0= 0

Description : Consider a full-adder with the following input values: (a) x=1, y=0 and Ci(carry input) = 0 (b) x=0, y=1 and Ci = 1 Compute the values of S(sum) and C0 (carry output) for the above input values. (A) S=1 , C0= 0 and ... C0= 1 (C) S=1 , C0= 1 and S=0 , C0= 0 (D) S=0 , C0= 1 and S=1 , C0= 0

Last Answer : (A) S=1 , C0= 0 and S=0 , C0= 1

Which of the following is a sequential circuit? (A) Multiplexer (B) Decoder (C) Counter (D) Full adder

Description : Which of the following is a sequential circuit? (A) Multiplexer (B) Decoder (C) Counter (D) Full adder

Last Answer : (C) Counter

Describe how Op-Amp is used as adder using circuit diagram and output voltage equation.

Description : Describe how Op-Amp is used as adder using circuit diagram and output voltage equation.

Last Answer : Summing Amplifier Circuit In this simple summing amplifier circuit, the output voltage, ( Vout ) now becomes proportional to the sum of the input voltages, V1, V2, V3, etc. Then we can ... to the non-inverting input of the op-amp, it will produce the positive sum of the input voltages.

A full adder is a combinational circuit that performs the arithmetic sum of three input bits and produces a

Description : A full adder is a combinational circuit that performs the arithmetic sum of three input bits and produces a (a) sum output (b) sum output and a carry (c) sum output with two carries (d) two sums with two carries

Last Answer : A full adder us an a combination logical circuit which will produces an sum and carry when ever more than two inputs were given.

The fast carry or look-ahead carry circuits found in most 4-bit parallel-adder circuits:

Description : The fast carry or look-ahead carry circuits found in most 4-bit parallel-adder circuits:  (1) Increase ripple delay (2) Add a 1 to complemented inputs (3) Reduce propagation delay (4) Determine sign and magnitude

Last Answer : The fast carry or look-ahead carry circuits found in most 4-bit parallel-adder circuits: Reduce propagation delay.

List out features of any four addressing modes of 8051.

Description : List out features of any four addressing modes of 8051.

Last Answer : 1.Immediate addressing mode: In this Immediate Addressing Mode, the data is provided in the instruction itself. The data is provided immediately after the opcode. These are some examples of Immediate Addressing Mode. MOVA ... us see some examples of this mode. MOV 0E5H, @R0 MOV @R1, 80H

List out any four assembler directives and state their functions.

Description : List out any four assembler directives and state their functions.

Last Answer : ORG directive: It is used to specify starting address of the Program. A 16bit address follows ORG ORG 0020H will start program from 0020H memory location.  END directive: It indicates end of the ... that when the label appears in the program, itp constant value will be substituted for the label.

State functions of preset, clear, clock and SR inputs related to SR flip flop.

Description : State functions of preset, clear, clock and SR inputs related to SR flip flop.

Last Answer : Preset Input: is an asynchronous input to set the Q output to 1 Clear Input: is also asynchronous input to reset the Q output to 0 Clock Input: is used to input external logic clock pulse (HIGH-LO) to ... set the Q output. And R is the reset input which is used to reset Q output of the flipflop.

State Demorgan's theorem's and prove both theorems using truth table.

Description : State Demorgan's theorem's and prove both theorems using truth table.

Last Answer : De Morgan's 1st theorem states that when the OR sum of two variables is inverted, this is the same as inverting each variable individually and then ANDing these inverted variables. De Morgan's 2nd ... individually and then ORing them. In Boolean equation form it can be written as

Define following terms related to logic families : (i) Noise Margin (ii) FAN-OUT (iii) Propagation delay (iv) Power dissipation

Description : Define following terms related to logic families : (i) Noise Margin (ii) FAN-OUT (iii) Propagation delay (iv) Power dissipation

Last Answer : i) Noise immunity is measured in terms of noise margin. High state Noise margin = VNH = VOH(min) - VIH(min) Low state Noise margin = VNL = VIL(max) - VOL(max) i) The fan-out is defined as the ... logical 0 state (HIGH to LOW) iii) Average power dissipation is defined as PD(avg) = ICC(avg) * VCC

Find out number of data lines required to interface 16 LEDs arrange in the 4 x 4 matrix form.

Description : Find out number of data lines required to interface 16 LEDs arrange in the 4 x 4 matrix form.

Last Answer : 4+4=8, eight lines are required for 4x4 matrix of 16 LEDs

If initial content of accumulator is 44 H, find out the new content of accumulator after execution of the instruction RR A

Description : If initial content of accumulator is 44 H, find out the new content of accumulator after execution of the instruction RR A

Last Answer : Contents of Acc will be 22H ( as RR A divides acc by 2)

Identify direct addressing instructions from following instructions : (i) MOV RO, R5 (ii) MOV RO, 80 H (iii) MOV RO, #75H (iv) ADD A, 45 H

Description : Identify direct addressing instructions from following instructions : (i) MOV RO, R5 (ii) MOV RO, 80 H (iii) MOV RO, #75H (iv) ADD A, 45 H

Last Answer : Instructions ii) and iv) are direct addressing as 80H and 45H are direct addresses

Define the term 'Multiplexer'. State two examples of multiplexer.

Description : Define the term 'Multiplexer'. State two examples of multiplexer.

Last Answer : A digital multiplexer or data selector is a logic circuit that accepts several (many) digital data inputs and selects one of them at any given time to pass on to the output. 1. Two input multiplexer 2. Four input multiplexer 3. Eight input multiplexer

The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’

Description : The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’ with one of the following conditions by applying A) J = 0, K = 0 and using a clock B) J = 1, K = 0 and using the clock C) Asynchronous preset input D) J = 1, K = 1 and using the clock 

Last Answer : The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’ with one of the following conditions by applying J = 1, K = 1 and using the clock 

Which one of the following logic circuit has the highest speed as compared to the currently available logic

Description : Which one of the following logic circuit has the highest speed as compared to the currently available logic circuits? A) Resistance-transistor logic B) Emitter-coupled logic C) Integrated-injection logic D) Diode-transistor logic 

Last Answer : Which one of the following logic circuit has the highest speed as compared to the currently available logic circuits? A) Resistance-transistor logic B) Emitter-coupled logic C) Integrated-injection logic D) Diode-transistor logic 

What is the 2's complement of 01101?

Description : What is the 2's complement of 01101? A) 10010 B) 10011 C) 1100 D) 1001 

Last Answer : What is the 2's complement of 01101? A) 10010 B) 10011 C) 1100 D) 1001 

The current mode logic (CML) is same as

Description : The current mode logic (CML) is same as A) LSI B) CMOS C) TTL D) ECL

Last Answer : The current mode logic (CML) is same as ECL

Which code is used in constructing k-maps?

Description : Which code is used in constructing k-maps?  A) Hamming code B) 2 out of 5 code C) BCD code D) Gray code 

Last Answer : Which code is used in constructing k-maps?  A) Hamming code B) 2 out of 5 code C) BCD code D) Gray code 

For a NAND gate, when one or more inputs are low then the output will be

Description :  For a NAND gate, when one or more inputs are low then the output will be A) Low B) High C) Alternately high and low D) High or low depending on relative magnitude of inputs 

Last Answer :  For a NAND gate, when one or more inputs are low then the output will be High 

Decimal equivalent of Hexadecimal number (C3B1)16 is:

Description :  Decimal equivalent of Hexadecimal number (C3B1)16 is: A) 12197 B) 32097 C) 52097 D) 50097

Last Answer :  Decimal equivalent of Hexadecimal number (C3B1)16 is: 50097

A NOR gate is equivalent to a bubbled AND gate. This statement is an outcome of:

Description : A NOR gate is equivalent to a bubbled AND gate. This statement is an outcome of: (1) De Morgan’s Law (2) Involution Law (3) Law of Absorption (4) Idempotent Law

Last Answer : A NOR gate is equivalent to a bubbled AND gate. This statement is an outcome of: De Morgan’s Law 

Initially the number decimal 8 is stored. If instruction RAL is executed twice, the final number stored will be:

Description : Initially the number decimal 8 is stored. If instruction RAL is executed twice, the final number stored will be: (1) Decimals 8 (2) Decimal 16 (3) Decimal 32 (4) Decimal 2 

Last Answer : Initially the number decimal 8 is stored. If instruction RAL is executed twice, the final number stored will be: Decimal 32

Determine the output frequency for a frequency division circuit that contains 12 flip–flops with an input

Description : Determine the output frequency for a frequency division circuit that contains 12 flip–flops with an input clock frequency of 20.48 MHz: (1) 10.24 kHz (2) 5 kHz (3) 30.24 kHz (4) 15 kHz 

Last Answer : Determine the output frequency for a frequency division circuit that contains 12 flip–flops with an input clock frequency of 20.48 MHz: 5 kHz

The output of an exclusive–NOR gate is 1. Which input combination is correct?

Description : The output of an exclusive–NOR gate is 1. Which input combination is correct? (1) A = 1, B = 0 (2) A = 0, B = 1 (3) A = 0, B = 0 (4) None of these 

Last Answer : The output of an exclusive–NOR gate is 1. Which input combination is correct? (1) A = 1, B = 0 (2) A = 0, B = 1 (3) A = 0, B = 0 (4) None of these 

How many flip-flops are required to build a binary counter circuit to count from 0 to 1023 ?

Description : How many flip-flops are required to build a binary counter circuit to count from 0 to 1023 ? (a) 1 (b) 6 (c) 10 (d) 23 

Last Answer : (c)10

In a positive edge triggered JK flip-flop, J = 1, K = 0 and clock pulse is rising, Q will be

Description : In a positive edge triggered JK flip-flop, J = 1, K = 0 and clock pulse is rising, Q will be (a) 0 (b) 1 (c) showing no change (d) toggle 

Last Answer : In a positive edge triggered JK flip-flop, J =1, K= 0 and clock pulse is rising, a Q will be 1

Output of NAND gate is 0. for three inputs when:

Description : Output of NAND gate is 0. for three inputs when:

Last Answer : Output of NAND gate is 0. for three inputs when: all the inputs are 1

How many minimum number of NOR gates are required to realize a two-input X-OR gate?

Description : How many minimum number of NOR gates are required to realize a two-input X-OR gate?

Last Answer : 5