Description : specify where to get the source and destination operands for the operation specified by the a. Operand fields and opcode b. Opcode and operand c. Source and destination d. Cpu and memory
Last Answer : a. Operand fields and opcode
Description : The operation is specified by a binary code known as the a. Operand code b. Opcode c. Source code d. — Allof these
Last Answer : b. Opcode
Description : Which of the following 2 task are performed to execute an instruction by MCU: a. Microinstruction execution b. Microinstruction sequencing c. Botha&b d. None of these
Last Answer : c. Botha&b
Description : Which are designed to interpret a specified number of instruction code. a. Programmer b. Processors c. Instruction d. Opcode
Last Answer : b. Processors
Description : Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer
Last Answer : Cc. Instruction register
Description : Instruction in computer languages consists of A) OPCODE B) OPERAND C) Both of above D) None of above
Last Answer : Answer : C
Description : Instruction in computer languages consists of a. OPCODE b. OPERAND c. Both of above d. None of above
Last Answer : Both of above
Last Answer : c. Both of above
Description : Micro-orders generate the_ __ address of operand and execute instruction and prepare for fetching next instruction from the main memory: a. Physical b. Effective c. Logical d. all of above
Last Answer : b. Effective
Description : In which addressing the operand is actually present in instruction: a. Immediate addressing b. Direct addressing 9 Register addressing a None of these
Last Answer : a. Immediate addressing
Description : An instruction code must specify the address of the__. a. Opecode b. Operand c. Both d. None
Last Answer : b. Operand
Description : program converts machine instructions into control signals. a. Control memory program b. Control store program c Botha&b d. Only memory
Last Answer : c Botha&b
Description : __is divided into a number of fields and is represented as a sequence of bits: a. instruction b. — instruction set c. instruction code d. parity code
Last Answer : a. instruction
Description : In 3 state gate two states act as signals equal to. a. Logic O b. Logic 1 c. None of these d. Botha&b
Last Answer : d. Botha&b
Description : Assemblers are of 2 types: a. 1 pass b. 2 pass co botha&b d. none of these
Last Answer : co botha&b
Description : A linker is also known as: a. Binder b. Linkage editor c. Botha&b d. None of these
Description : isa__ expression which will have value true or false. a. Relational b. Logical ce. Botha&b d. None of these
Last Answer : ce. Botha&b
Description : An unstructured program uses a approach to solve problems: a. Linear b. Top down co Botha&b d. None of these
Last Answer : co Botha&b
Description : _is sequence of instructions is executed and repeated any no. of times in loop until logical condition is true: a. Iteration b. Repetition c Botha&b d. None of these
Description : Which are of the following instructions of hardware subroutines: a. SCAL b. SXIT co Botha&b d. None of these
Description : Subroutine is called _ a. In Same program b. Inexternal program co Botha&b d. None of these
Description : Mode of addresses in control memory are: a. Executive mode b. Task mode c. Botha&b d. None of these
Description : What are 2 advantages of cache memory: a. Reduction of average access time for CPU memory b. Reduction of bandwidth of available memory of CPU c. Botha&b d. None of these
Description : What are the four parts of label , opcode , operand and comment ?
Last Answer : Labels , opcodes , operands and comments are the four parts of a mechanical language.
Description : Which operation use one operand or unary operations: a. Arithmetic b. Logical c. Both d. None
Last Answer : c. Both
Description : In which addressing the simplest addressing mode where an operand is fetched from memory is a. Immediate addressing b. Direct addressing c. Register addressing d. None of these
Last Answer : b. Direct addressing
Description : In which mode the main memory location holds the EA of the operand: a. Immediate addressing b. Direct addressing c. Register addressing d. Indirect addressing
Last Answer : d. Indirect addressing
Description : Which operation is used to shift the content of an operand to one or more bits to provide necessary variation: a. Logical and bit manipulation b. Shift manipulation c. Circular manipulation d. None of these
Last Answer : b. Shift manipulation
Description : Which is the most important component of a digit computer that interprets the instruction and processes the data contained in computer programs: MU b. ALU c. CPU d. PC
Last Answer : c. CPU
Description : One of use of microprogramming to implement _ ____ of processor in Intel 80x86 and Motorola 680x0 processors whose instruction set are evolved from 360 original. a. Control structure b. Without control c. Control unit d. Only control
Last Answer : c. Control unit
Description : In length instruction other programs on the other hand, want a small and fixed-size instruction set that contains only a limited number of opcodes, as in case of a. RISC b CISC c. Both d. None
Last Answer : a. RISC
Description : Which are instruction in which two machine cycle are required: a. Instruction cycle b. Memory reference instruction c. Both d. None of these
Last Answer : b. Memory reference instruction
Description : Which section is basically a sequence of instruction with a clear indication of beginning and end for updating shared variables. a. Racing section b. Critical section c. d. Both None of thes
Last Answer : . Critical sectio
Description : The complete set of op-codes for a particular microprocessor defines the_ set for that processor: a. Code b. Function c. Module d. Instruction
Last Answer : d. Instruction
Description : Which is the method by which instructions are selected for execution: a. Instruction selection b. — Selection control c. Instraction sequencing d. All of these
Last Answer : c. Instraction sequencing
Description : The simplest method of controlling sequence of instruction execution is to have each instruction explicitly specify: a. The address of next instruction to be run b. Address of previous instruction c. Both a &b d. None of these
Last Answer : a. The address of next instruction to be run
Description : As the instruction length increases ————_ of instruction addresses in all the instruction is_ a. Implicit inclusion b. Implicit and disadvantageous c. Explicit and disadvantageous d. Explicit and disadvantageous
Last Answer : c. Explicit and disadvantageous
Description : __is the sequence of operations performed by CPU in processing an instruction: a. Execute cycle b. Fetch cycle c. Decode d. Instruction cycle
Last Answer : d. Instruction cycle
Description : The time required to complete one instruction is called. a. Fetch time b. Execution time c. Control time d. All of these
Last Answer : b. Execution time
Description : _is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these
Last Answer : b. Fetch
Description : is the step during which the operations specified by the instruction are executed: a. Execute b. Decode c. Both a& b d. None of these
Last Answer : a. Execute
Description : Decode is the step during which instruction is__ a. Initialized b. Incremented c. Decoded d. Bothb&c
Last Answer : c. Decoded
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : The contents of the program counter isthe __——__—oof the instruction to be run. a. Data b. Address c. Counter d. None of these
Last Answer : b. Address
Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next
Last Answer : c. Instruction register, incremented and next
Description : Execution of instruction specified by instruction to perform: a. Operation b. Operands c. Both a &b d. None of these
Last Answer : a. Operation
Description : Which unit is necessary for the execution of instruction: a. Timing b. Control ce. Both d. None of these
Last Answer : ce. Both
Description : sis given an instruction in machine language this instruction is fetched from the memory by the CPU to execute: a. ALU b. CPU c. MU d. All of these
Last Answer : b. CPU
Description : Which cycle refers to the time period during which one instruction is fetched and executed by the CPU: a. Fetch cycle b. Instruction cycle c. Decode cycle d. Execute cycle
Last Answer : b. Instruction cycle
Description : Which instruction are 32 bits long , with extra 16 bits. a. Memory reference instruction b. Memory reference format c. Both d. None of these
Last Answer : a. Memory reference instruction