Mode of addresses in control memory are: a. Executive mode b. Task mode c. Botha&b d. None of these

Mode of addresses in control memory are:
a. Executive mode
b. Task mode
c. Botha&b
d. None of these
by

1 Answer

Answer :

c. Botha&b
by

Related questions

Which of the following 2 task are performed to execute an instruction by MCU: a. Microinstruction execution b. Microinstruction sequencing c. Botha&b d. None of these

Description : Which of the following 2 task are performed to execute an instruction by MCU: a. Microinstruction execution b. Microinstruction sequencing c. Botha&b d. None of these

Last Answer : c. Botha&b

which of the following is interrupt mode. a. Task mode b. Executive mode c. Botha &b d. None of these

Description : which of the following is interrupt mode. a. Task mode b. Executive mode c. Botha &b d. None of these

Last Answer : b. Executive mode

program converts machine instructions into control signals. a. Control memory program b. Control store program c Botha&b d. Only memory

Description : program converts machine instructions into control signals. a. Control memory program b. Control store program c Botha&b d. Only memory

Last Answer : c Botha&b

What are 2 advantages of cache memory: a. Reduction of average access time for CPU memory b. Reduction of bandwidth of available memory of CPU c. Botha&b d. None of these

Description : What are 2 advantages of cache memory: a. Reduction of average access time for CPU memory b. Reduction of bandwidth of available memory of CPU c. Botha&b d. None of these

Last Answer : c. Botha&b

Addresses in control memory is made by for each register group: a. Address select logic b. Data select logic c. Control select logic d. All of these

Description : Addresses in control memory is made by for each register group: a. Address select logic b. Data select logic c. Control select logic d. All of these

Last Answer : a. Address select logic

Two important fields of an instruction are. a. Opcode b. Operand c. Only a d. Botha&b

Description : Two important fields of an instruction are. a. Opcode b. Operand c. Only a d. Botha&b

Last Answer : d. Botha&b

In 3 state gate two states act as signals equal to. a. Logic O b. Logic 1 c. None of these d. Botha&b

Description : In 3 state gate two states act as signals equal to. a. Logic O b. Logic 1 c. None of these d. Botha&b

Last Answer : d. Botha&b

Assemblers are of 2 types: a. 1 pass b. 2 pass co botha&b d. none of these

Description : Assemblers are of 2 types: a. 1 pass b. 2 pass co botha&b d. none of these

Last Answer : co botha&b

A linker is also known as: a. Binder b. Linkage editor c. Botha&b d. None of these

Description : A linker is also known as: a. Binder b. Linkage editor c. Botha&b d. None of these

Last Answer : c. Botha&b

<Condition>isa__ expression which will have value true or false. a. Relational b. Logical ce. Botha&b d. None of these

Description : isa__ expression which will have value true or false. a. Relational b. Logical ce. Botha&b d. None of these

Last Answer : ce. Botha&b

An unstructured program uses a approach to solve problems: a. Linear b. Top down co Botha&b d. None of these

Description : An unstructured program uses a approach to solve problems: a. Linear b. Top down co Botha&b d. None of these

Last Answer : co Botha&b

_is sequence of instructions is executed and repeated any no. of times in loop until logical condition is true: a. Iteration b. Repetition c Botha&b d. None of these

Description : _is sequence of instructions is executed and repeated any no. of times in loop until logical condition is true: a. Iteration b. Repetition c Botha&b d. None of these

Last Answer : c Botha&b

Which are of the following instructions of hardware subroutines: a. SCAL b. SXIT co Botha&b d. None of these

Description : Which are of the following instructions of hardware subroutines: a. SCAL b. SXIT co Botha&b d. None of these

Last Answer : co Botha&b

Subroutine is called _ a. In Same program b. Inexternal program co Botha&b d. None of these

Description : Subroutine is called _ a. In Same program b. Inexternal program co Botha&b d. None of these

Last Answer : co Botha&b

Itis the task of the __to locate externally defined symbols in programs, load them in to memory by placing their __ of symbols in calling program: a. Loader and name b. Linker and values c. Linker and name d. Loader and values

Description : Itis the task of the __to locate externally defined symbols in programs, load them in to memory by placing their __ of symbols in calling program: a. Loader and name b. Linker and values c. Linker and name d. Loader and values

Last Answer : d. Loader and values

In which addressing the simplest addressing mode where an operand is fetched from memory is a. Immediate addressing b. Direct addressing c. Register addressing d. None of these

Description : In which addressing the simplest addressing mode where an operand is fetched from memory is a. Immediate addressing b. Direct addressing c. Register addressing d. None of these

Last Answer : b. Direct addressing

In which mode the main memory location holds the EA of the operand: a. Immediate addressing b. Direct addressing c. Register addressing d. Indirect addressing

Description : In which mode the main memory location holds the EA of the operand: a. Immediate addressing b. Direct addressing c. Register addressing d. Indirect addressing

Last Answer : d. Indirect addressing

As the instruction length increases ————_ of instruction addresses in all the instruction is_ a. Implicit inclusion b. Implicit and disadvantageous c. Explicit and disadvantageous d. Explicit and disadvantageous

Description : As the instruction length increases ————_ of instruction addresses in all the instruction is_ a. Implicit inclusion b. Implicit and disadvantageous c. Explicit and disadvantageous d. Explicit and disadvantageous

Last Answer : c. Explicit and disadvantageous

To represent addresses in assembly language we use: a. String characters b Arrays c. Structure d Enum

Description : To represent addresses in assembly language we use: a. String characters b Arrays c. Structure d Enum

Last Answer : a. String characters

shave addresses where instructions are stored along with address of working storage: a. _ Relative entities b. Absolute entities c. Botha &b d. None of these

Description : shave addresses where instructions are stored along with address of working storage: a. _ Relative entities b. Absolute entities c. Botha &b d. None of these

Last Answer : a. _ Relative entities

Absolute entitiesare_ Ss whom value signify storage locations that are independent of resulting machine code: a. Numeric constants b. String constants c. Fixed addresses d. Operation codes e. Allofthese

Description : Absolute entitiesare_ Ss whom value signify storage locations that are independent of resulting machine code: a. Numeric constants b. String constants c. Fixed addresses d. Operation codes e. Allofthese

Last Answer : e. Allofthese

A module contains machine code with specification on_ _ a. Relative addresses b. Absolute addresses c. Object program d. None of these

Description : A module contains machine code with specification on_ _ a. Relative addresses b. Absolute addresses c. Object program d. None of these

Last Answer : a. Relative addresses

After actual locations for main storage are known, a __ adjusts relative addresses to these actual locations: a. Relocating loader b. Locating loader c. Default loader d. None of these

Description : After actual locations for main storage are known, a __ adjusts relative addresses to these actual locations: a. Relocating loader b. Locating loader c. Default loader d. None of these

Last Answer : a. Relocating loader

Loading is with the task of storage management of operating system and mostly preformed after assembly: a. Bound b. Expanded c. Overlaps d. All of these

Description : Loading is with the task of storage management of operating system and mostly preformed after assembly: a. Bound b. Expanded c. Overlaps d. All of these

Last Answer : a. Bound

Which unit acts as the brain of the computer which control other peripherals and interfaces: a. Memory unit b. Cache unit c. Timing and control unit d. None of these

Description : Which unit acts as the brain of the computer which control other peripherals and interfaces: a. Memory unit b. Cache unit c. Timing and control unit d. None of these

Last Answer : c. Timing and control unit

Which unit works as an interface between the processor and all the memories on chip or off- chip: a. Timing unit b. Control unit c. Memory control unit d All of these

Description : Which unit works as an interface between the processor and all the memories on chip or off- chip: a. Timing unit b. Control unit c. Memory control unit d All of these

Last Answer : c. Memory control unit

Which microprocessor has the control unit, memory unit and arithmetic and logic unit: a. Pentium IV processor b Pentium V processor c. Pentium III processor d. None of these

Description : Which microprocessor has the control unit, memory unit and arithmetic and logic unit: a. Pentium IV processor b Pentium V processor c. Pentium III processor d. None of these

Last Answer : a. Pentium IV processor

The micro program is an written in microcode and stored in firmware which is also referred as___ | a. Interpreter and control memory b. Translator and control store c. Translator and control memory d. ‘Interpreter and Translator

Description : The micro program is an written in microcode and stored in firmware which is also referred as___ | a. Interpreter and control memory b. Translator and control store c. Translator and control memory d. ‘Interpreter and Translator

Last Answer : a. Interpreter and control memory

Which microinstruction provide next instruction from control memory: a. Microinstruction execution b. Microinstruction Buffer c. Microinstruction decoder d. Microinstraction Sequencing

Description : Which microinstruction provide next instruction from control memory: a. Microinstruction execution b. Microinstruction Buffer c. Microinstruction decoder d. Microinstraction Sequencing

Last Answer : d. Microinstraction Sequencing

Acontrol memory is__ stored in some area of memory: a. Control instraction b. Memory instruction c. Register instruction d. None of these

Description : Acontrol memory is__ stored in some area of memory: a. Control instraction b. Memory instruction c. Register instruction d. None of these

Last Answer : a. Control instraction

A computer having writable control memory is known as_ a. Static micro programmable b. Dynamic micro programmable c. Botha & b d. None of these

Description : A computer having writable control memory is known as_ a. Static micro programmable b. Dynamic micro programmable c. Botha & b d. None of these

Last Answer : b. Dynamic micro programmable

The control memory contains a set of words where each word is: a. Microinstruction b. Program c. Sets d. All of these

Description : The control memory contains a set of words where each word is: a. Microinstruction b. Program c. Sets d. All of these

Last Answer : a. Microinstruction

During program execution content of main memory undergo changes and, but control memory has _ microprogram: a. Static b. Dynamic c. Compile time d. Fixed

Description : During program execution content of main memory undergo changes and, but control memory has _ microprogram: a. Static b. Dynamic c. Compile time d. Fixed

Last Answer : d. Fixed

Control memory is part of __ that has addressable storage registers and used as temporary storage for data. a. ROM b. RAM c. CPU d. Memory

Description : Control memory is part of __ that has addressable storage registers and used as temporary storage for data. a. ROM b. RAM c. CPU d. Memory

Last Answer : b. RAM

How many modes the address in control memory are divided. a 2 b 3 c. 5 d 7

Description : How many modes the address in control memory are divided. a 2 b 3 c. 5 d 7

Last Answer : a 2

There are how many register groups in control memory: a 3 b 5 c. 6 d 8

Description : There are how many register groups in control memory: a 3 b 5 c. 6 d 8

Last Answer : b 5

What type of circuit is used by control memory to interconnect registers. a. Data routing circuit b. Address routing circuit c. Control routing circuit d. None of the these

Description : What type of circuit is used by control memory to interconnect registers. a. Data routing circuit b. Address routing circuit c. Control routing circuit d. None of the these

Last Answer : a. Data routing circuit

Copy of data in cache memory is called. a. Datacache b. Execution cache c. Address cache d. Control cache

Description : Copy of data in cache memory is called. a. Datacache b. Execution cache c. Address cache d. Control cache

Last Answer : a. Datacache

In cache memory hit rate indicates. a. Data from requested address is not available b. Data from requested address is available c. Control from requested address is available d. Address from requested address is not available

Description : In cache memory hit rate indicates. a. Data from requested address is not available b. Data from requested address is available c. Control from requested address is available d. Address from requested address is not available

Last Answer : b. Data from requested address is available

In register stack a stack can be a finite number of a Control word b. Memory word c Transfer word d. — Allof these

Description : In register stack a stack can be a finite number of a Control word b. Memory word c Transfer word d. — Allof these

Last Answer : b. Memory word

___ mode of addressing is a form of implied addressing: a. Stack b. Array Cc. Queue d. ‘Binary

Description : ___ mode of addressing is a form of implied addressing: a. Stack b. Array Cc. Queue d. ‘Binary

Last Answer : a. Stack

The final addressing mode that we consider is a. Immediate addressing b. Direct addressing c. Register addressing d. Stack addressing

Description : The final addressing mode that we consider is a. Immediate addressing b. Direct addressing c. Register addressing d. Stack addressing

Last Answer : d. Stack addressing

emaphore provides mutual exclusion for accesses to the buffer pool and is initialized to the value: a. Mutex b. Mutual Cc. Memory d. __ Allof these

Description : emaphore provides mutual exclusion for accesses to the buffer pool and is initialized to the value: a. Mutex b. Mutual Cc. Memory d. __ Allof these

Last Answer : Mutex

Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these

Description : Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these

Last Answer : b. Cache memory

specify where to get the source and destination operands for the operation specified by the a. Operand fields and opcode b. Opcode and operand c. Source and destination d. Cpu and memory

Description : specify where to get the source and destination operands for the operation specified by the a. Operand fields and opcode b. Opcode and operand c. Source and destination d. Cpu and memory

Last Answer : a. Operand fields and opcode

The source/destination of operands can be the_ or one of the general-purpose register: a. Memory b. One c. both d. None of these

Description : The source/destination of operands can be the_ or one of the general-purpose register: a. Memory b. One c. both d. None of these

Last Answer : a. Memory

_is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these

Description : _is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these

Last Answer : b. Fetch

The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read

Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read

Last Answer : d. Address register and read

The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, incremented and next b. Instruction register, incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next

Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next

Last Answer : c. Instruction register, incremented and next

sis given an instruction in machine language this instruction is fetched from the memory by the CPU to execute: a. ALU b. CPU c. MU d. All of these

Description : sis given an instruction in machine language this instruction is fetched from the memory by the CPU to execute: a. ALU b. CPU c. MU d. All of these

Last Answer : b. CPU