Description : Which cycle refers to the time period during which one instruction is fetched and executed by the CPU: a. Fetch cycle b. Instruction cycle c. Decode cycle d. Execute cycle
Last Answer : b. Instruction cycle
Description : _is the step during which a new instruction is read from the memory: a Decode b. Fetch c. Execute d. None of these
Last Answer : b. Fetch
Description : is the step during which the operations specified by the instruction are executed: a. Execute b. Decode c. Both a& b d. None of these
Last Answer : a. Execute
Description : __is divided into a number of fields and is represented as a sequence of bits: a. instruction b. — instruction set c. instruction code d. parity code
Last Answer : a. instruction
Description : Pipeline implement a. fetch instruction b. decode instruction c. fetch operand d. calculate operand e. execute instruction f. all of abve
Last Answer : f. all of abve
Description : A computer executes programs in the sequence of : (1) Execute, Fetch, Decode (2) Store, Fetch, Execute (3) Fetch, Decode, Execute (4) Decode, Fetch, Execute
Last Answer : Fetch, Decode, Execute
Description : How do the contents of the MAR and MDR registers changes during the fetch decode execute cycle?
Last Answer : Need answer
Description : sis given an instruction in machine language this instruction is fetched from the memory by the CPU to execute: a. ALU b. CPU c. MU d. All of these
Last Answer : b. CPU
Description : Jump has 3 major states are: a. Fetch b. Decode c. Complete d= Allof these
Last Answer : d= Allof these
Description : Which of the following 2 task are performed to execute an instruction by MCU: a. Microinstruction execution b. Microinstruction sequencing c. Botha&b d. None of these
Last Answer : c. Botha&b
Description : Which functions are performed by CU: a. Data exchange b/w CPU and memory or I/O modules b. External operations c. Internal operations inside CPU d Botha&c
Last Answer : d Botha&c
Description : What is the control unit's function in the CPU? a. To transfer data to primary storage b. to store program instruction c. to perform logic operations d. to decode program instruction
Last Answer : b. to store program instruction
Description : is an external hardware event which causes the CPU to interrupt the current instruction sequence: a. Input interrupt b. Output interrupt c. Both d. None of these
Last Answer : c. Both
Description : Who is the represents the fundamental process in the operation of the CPU: a. The fetch-execute cycle and pipelining b. The assembly c. Both A and B d. None of these
Last Answer : a. The fetch-execute cycle and pipelining
Description : Decode is the step during which instruction is__ a. Initialized b. Incremented c. Decoded d. Bothb&c
Last Answer : c. Decoded
Description : The time required to complete one instruction is called. a. Fetch time b. Execution time c. Control time d. All of these
Last Answer : b. Execution time
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : A CPU handles interrupt by executing interrupt service subroutine................. (A) by checking interrupt register after execution of each instruction (B) by checking interrupt register ... cycle (C) whenever an interrupt is registered (D) by checking interrupt register at regular time interval
Last Answer : (A) by checking interrupt register after execution of each instruction
Description : Micro-orders generate the_ __ address of operand and execute instruction and prepare for fetching next instruction from the main memory: a. Physical b. Effective c. Logical d. all of above
Last Answer : b. Effective
Description : __is data paths there is movement of data from one register to another or b/w ALU and a register. a. External b. Boreal c. Internal d. Exchange
Last Answer : c. Internal
Description : Which is the most important component of a digit computer that interprets the instruction and processes the data contained in computer programs: MU b. ALU c. CPU d. PC
Last Answer : c. CPU
Description : Modern assemblers for RISC based architectures make optimization of instruction scheduling to make use of CPU __ efficiently: a. Pipeline b. Without pipeline c. Botha &b d. None of these
Last Answer : a. Pipeline
Description : Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU
Last Answer : b. Main memory
Description : Which are contains one or more register that may be referenced by machine instruction: a. Input b. Output c. CPU d. ALU
Description : The instruction set can have variable-length instruction format primarily due to: a. Varying number of operands b. Varying length of opcodes in some CPU ce. Both d. None
Last Answer : ce. Both
Description : Each instruction is executed by set of micro operations termed as. a. Micro instructions b. Mini instructions c. Botha &b d. None of these
Last Answer : a. Micro instructions
Description : Which are internal operations inside CPU: a. Data transfer b/w registers b. Instructing ALU to operate data c. Regulation of other internal operations d. All of these
Last Answer : d. All of these
Description : Which operations are to be performed on a directory are: a. Search for a file b. Create a file c. Delete a file d. List a directory e. Rename a file f. Traverse the file system g. Allof these
Last Answer : g. Allof these
Description : In conversion to reverse polish notation the __and__ operations are performed at the end. a. Addand subtract b Subtract and multiplication 9 Multiplication and subtract a All of these
Last Answer : a. Addand subtract
Description : Which section is basically a sequence of instruction with a clear indication of beginning and end for updating shared variables. a. Racing section b. Critical section c. d. Both None of thes
Last Answer : . Critical sectio
Description : The simplest method of controlling sequence of instruction execution is to have each instruction explicitly specify: a. The address of next instruction to be run b. Address of previous instruction c. Both a &b d. None of these
Last Answer : a. The address of next instruction to be run
Description : Which instruction are arranged as per the protocols of memory reference format of the input file in a simple ASCII sequence of integers between the range O to 99 separated by spaces without formatted text ... : a. Memory reference instruction b. Memory reference format c. Both d. None of these
Last Answer : a. Memory reference instruction
Description : In instruction formats instruction is represent by a___ _ of bits: a. Sequence b. Parallel c. Both d. None
Last Answer : a. Sequence
Description : In program control the instruction is set for the statement in a: a. Parallel b. Sequence c. Both d. None
Last Answer : b. Sequence
Description : The fetch-execute cycle is to use a system know as: a. Assembly line b. Pipelining c. Cache d. None of these
Last Answer : b. Pipelining
Description : How can we make computers work faster? a. The fetch-execute cycle and pipelining b. The assembly c. Both A and B d. None of these
Description : The necessary steps carried out to perform the operation of accessing either memory or I/O Device, constitute a ___________________ a) fetch operation b) execute operation c) machine cycle
Last Answer : c) machine cycle
Description : Which are the operation of versatility: a. exchange of information with the outside world via I/O device b. Transfer of data internally with in the central processing unit c. Performs of the basic arithmetic operations d. = Allof these
Last Answer : d. = Allof these
Description : Which are instruction in which two machine cycle are required: a. Instruction cycle b. Memory reference instruction c. Both d. None of these
Last Answer : b. Memory reference instruction
Description : The act of acquiring an instruction is referred as the____ the instruction: a. Fetching b. Fetch cycle c. Both a and b d. None of these
Last Answer : a. Fetching
Description : Which is the main function of the computer. a. Execute of programs b. Execution of programs c. Both d. None of these
Last Answer : b. Execution of programs
Description : Assembler works to convert assembly language program into machine language : a. Before the computer can execute it b. After the computer can execute it c. In between execution d. All of these
Last Answer : a. Before the computer can execute it
Description : What is the purpose of microinstruction executions. a. Generate a control signal b. Generate a control signal to compile c. Generate a control signal to execute d. Allof these
Last Answer : c. Generate a control signal to execute
Description : ……… is a group of words or coded instruction for the NC/CNC system to execute aparticular movement. a.Sequence b.Address c.Code d.Block
Last Answer : d.Block
Description : Repetitive CNC machine operations conveniently performing and execute with onecommand instead of programming of series of individual move called ….. a.Common Cycle b.Incremental Programming c.Canned Cycle d.None of the above
Last Answer : c.Canned Cycle
Description : Two important fields of an instruction are. a. Opcode b. Operand c. Only a d. Botha&b
Last Answer : d. Botha&b
Description : The complete set of op-codes for a particular microprocessor defines the_ set for that processor: a. Code b. Function c. Module d. Instruction
Last Answer : d. Instruction
Description : Which is the method by which instructions are selected for execution: a. Instruction selection b. — Selection control c. Instraction sequencing d. All of these
Last Answer : c. Instraction sequencing
Description : As the instruction length increases ————_ of instruction addresses in all the instruction is_ a. Implicit inclusion b. Implicit and disadvantageous c. Explicit and disadvantageous d. Explicit and disadvantageous
Last Answer : c. Explicit and disadvantageous
Description : The contents of the program counter isthe __——__—oof the instruction to be run. a. Data b. Address c. Counter d. None of these
Last Answer : b. Address