Description : Micro-orders generate the_ __ address of operand and execute instruction and prepare for fetching next instruction from the main memory: a. Physical b. Effective c. Logical d. all of above
Last Answer : b. Effective
Description : The simplest method of controlling sequence of instruction execution is to have each instruction explicitly specify: a. The address of next instruction to be run b. Address of previous instruction c. Both a &b d. None of these
Last Answer : a. The address of next instruction to be run
Description : specify where to get the source and destination operands for the operation specified by the a. Operand fields and opcode b. Opcode and operand c. Source and destination d. Cpu and memory
Last Answer : a. Operand fields and opcode
Description : Two important fields of an instruction are. a. Opcode b. Operand c. Only a d. Botha&b
Last Answer : d. Botha&b
Description : In which addressing the operand is actually present in instruction: a. Immediate addressing b. Direct addressing 9 Register addressing a None of these
Last Answer : a. Immediate addressing
Description : is the__ _ value of variable which will be added every time: a. Increment b. Decrement c. Expanding d. None of these
Last Answer : a. Increment
Description : The operation is specified by a binary code known as the a. Operand code b. Opcode c. Source code d. — Allof these
Last Answer : b. Opcode
Description : Single address computer instruction has two parts: a. The operation code b. The operand c. A and B d. None of these
Last Answer : c. A and B
Description : Which operation use one operand or unary operations: a. Arithmetic b. Logical c. Both d. None
Last Answer : c. Both
Description : In length instruction some programs wants a complex instruction set containing more instruction, more addressing modes and greater address rang, as in case of a. RISC b. CISC c. Both d. None
Last Answer : b. CISC
Description : In which addressing the simplest addressing mode where an operand is fetched from memory is a. Immediate addressing b. Direct addressing c. Register addressing d. None of these
Last Answer : b. Direct addressing
Description : In which mode the main memory location holds the EA of the operand: a. Immediate addressing b. Direct addressing c. Register addressing d. Indirect addressing
Last Answer : d. Indirect addressing
Description : Which operation is used to shift the content of an operand to one or more bits to provide necessary variation: a. Logical and bit manipulation b. Shift manipulation c. Circular manipulation d. None of these
Last Answer : b. Shift manipulation
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : The contents of the program counter isthe __——__—oof the instruction to be run. a. Data b. Address c. Counter d. None of these
Last Answer : b. Address
Description : The instruction read from memory is then placed in the ___and contents of program counter is __ so that it contains the address of_ __ instruction in the program. a. Program counter, ... incremented and previous c. Instruction register, incremented and next d. Address register, decremented and next
Last Answer : c. Instruction register, incremented and next
Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine
Last Answer : d. Executable, Stack and Subroutine
Description : Opcode is the machine instruction obtained from decoding instruction stored in. a. Stack pointer b. Address pointer Cc. Instruction register d. Incrementer
Last Answer : Cc. Instruction register
Description : Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU
Last Answer : b. Main memory
Description : Who change the address in the program counter and cause the flow of control to be altered: a Shift manipulation b. Circular manipulation c. Program control instruction d. __ Allof these
Last Answer : c. Program control instruction
Description : A basic instruction that can be interpreted by computer generally has ________ A. An operand and an address B. decoder and an accumulator C. Sequence register and decoder D. None of the Above
Last Answer : A. An operand and an address
Description : The complete set of op-codes for a particular microprocessor defines the_ set for that processor: a. Code b. Function c. Module d. Instruction
Last Answer : d. Instruction
Description : Which are designed to interpret a specified number of instruction code. a. Programmer b. Processors c. Instruction d. Opcode
Last Answer : b. Processors
Description : __is divided into a number of fields and is represented as a sequence of bits: a. instruction b. — instruction set c. instruction code d. parity code
Last Answer : a. instruction
Description : In second pass, assembler creates _ in binary format for every instruction in program and then refers to the symbol table to giving every symbol an_ _ relating the segment. a. Code and program b. Program and instruction c. Code and offset d. All of these
Last Answer : c. Code and offset
Description : To design a program it requires __ os a. Program specification b. Code specification c. Instruction specification d. Problem specification
Last Answer : a. Program specification
Description : In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack
Last Answer : b. after OP code in the instruction
Description : is a symbolic representation of discrete elements of information: a. Data b. Code c. Address d. Control
Last Answer : b. Code
Description : By whom address of external function in the assembly source file supplied by __ when activated: a. Assembler b. Linker c. Machine d. Code
Last Answer : b. Linker
Description : Source statements consist of 5fields in microinstruction source code are: a. Lable b. Micro-ops c. CD-spec d. BR-spec e. Address f. All of these
Last Answer : f. All of these
Description : Which section is basically a sequence of instruction with a clear indication of beginning and end for updating shared variables. a. Racing section b. Critical section c. d. Both None of thes
Last Answer : . Critical sectio
Description : is the step during which the operations specified by the instruction are executed: a. Execute b. Decode c. Both a& b d. None of these
Last Answer : a. Execute
Description : Execution of instruction specified by instruction to perform: a. Operation b. Operands c. Both a &b d. None of these
Last Answer : a. Operation
Description : Which unit is necessary for the execution of instruction: a. Timing b. Control ce. Both d. None of these
Last Answer : ce. Both
Description : Which instruction are 32 bits long , with extra 16 bits. a. Memory reference instruction b. Memory reference format c. Both d. None of these
Last Answer : a. Memory reference instruction
Description : Which are instruction in which two machine cycle are required: a. Instruction cycle b. Memory reference instruction c. Both d. None of these
Last Answer : b. Memory reference instruction
Description : Which instruction are used in multithreaded parallel processor architecture. a. Memory reference instruction b. Memory reference format c. Both d. None of these
Description : Which instruction are arranged as per the protocols of memory reference format of the input file in a simple ASCII sequence of integers between the range O to 99 separated by spaces without formatted text ... : a. Memory reference instruction b. Memory reference format c. Both d. None of these
Description : is an external hardware event which causes the CPU to interrupt the current instruction sequence: a. Input interrupt b. Output interrupt c. Both d. None of these
Description : Each instruction is also accompanied by a___ : a. Microprocessor b. Microcode c. Both d. None of these
Last Answer : b. Microcode
Description : In instruction formats instruction is represent by a___ _ of bits: a. Sequence b. Parallel c. Both d. None
Last Answer : a. Sequence
Description : The length of instruction set depends on: a. Data size b. Memory size c. Both d. None
Last Answer : b. Memory size
Description : In length instruction other programs on the other hand, want a small and fixed-size instruction set that contains only a limited number of opcodes, as in case of a. RISC b CISC c. Both d. None
Last Answer : a. RISC
Description : The instruction set can have variable-length instruction format primarily due to: a. Varying number of operands b. Varying length of opcodes in some CPU ce. Both d. None
Description : Arithmetic instruction are used to perform operation on: a. Numerical data b. Non-numerical data c. Both d. None
Last Answer : a. Numerical data
Description : In program control the instruction is set for the statement in a: a. Parallel b. Sequence c. Both d. None
Last Answer : b. Sequence
Description : Which processor has a single instruction multiple data stream organization that manipulates the common instruction by means of multiple functional units. a. Attached array processor b. SIMD array processor c. Both d. None
Last Answer : b. SIMD array processor
Description : Instruction in computer languages consists of A) OPCODE B) OPERAND C) Both of above D) None of above
Last Answer : Answer : C
Description : Instruction in computer languages consists of a. OPCODE b. OPERAND c. Both of above d. None of above
Last Answer : Both of above
Last Answer : c. Both of above