List out any two instructions of following addressing modes: (i) Immediate addressing. (ii) Register addressing.

List out any two instructions of following addressing modes: (i) Immediate addressing. (ii) Register addressing.
by

1 Answer

Answer :

(i) Immediate addressing instructions:

1. MOV A, #36H

2. MOV DPTR, #27A2H

(ii) Register addressing.

1. MOV A, R0

2. MOV R7, A
by

Related questions

Which addressing mode is most suitable to change the normal sequence of execution of instructions? A. Immediate B. Indirect C. Relative D. None of the Above

Description : Which addressing mode is most suitable to change the normal sequence of execution of instructions? A. Immediate B. Indirect C. Relative D. None of the Above

Last Answer : C. Relative

In which addressing the operand is actually present in instruction: a. Immediate addressing b. Direct addressing 9 Register addressing a None of these

Description : In which addressing the operand is actually present in instruction: a. Immediate addressing b. Direct addressing 9 Register addressing a None of these

Last Answer : a. Immediate addressing

In which addressing the simplest addressing mode where an operand is fetched from memory is a. Immediate addressing b. Direct addressing c. Register addressing d. None of these

Description : In which addressing the simplest addressing mode where an operand is fetched from memory is a. Immediate addressing b. Direct addressing c. Register addressing d. None of these

Last Answer : b. Direct addressing

In which mode the main memory location holds the EA of the operand: a. Immediate addressing b. Direct addressing c. Register addressing d. Indirect addressing

Description : In which mode the main memory location holds the EA of the operand: a. Immediate addressing b. Direct addressing c. Register addressing d. Indirect addressing

Last Answer : d. Indirect addressing

Which addressing is an extremely influential way of addressing: a. Displacement addressing b. Immediate addressing 9 Direct addressing a Register addressing

Description : Which addressing is an extremely influential way of addressing: a. Displacement addressing b. Immediate addressing 9 Direct addressing a Register addressing

Last Answer : a. Displacement addressing

In post-indexing the contents of the address field are used to access a memory location containing a___ address: Immediate addressing Direct addressing Register addressing ao | None of these

Description : In post-indexing the contents of the address field are used to access a memory location containing a___ address: Immediate addressing Direct addressing Register addressing ao | None of these

Last Answer : Direct addressing

The final addressing mode that we consider is a. Immediate addressing b. Direct addressing c. Register addressing d. Stack addressing

Description : The final addressing mode that we consider is a. Immediate addressing b. Direct addressing c. Register addressing d. Stack addressing

Last Answer : d. Stack addressing

Which addressing offset can be the content of PC and also can be negative: a. Relative addressing b. Immediate addressing c. Direct addressing d. Register addressing

Description : Which addressing offset can be the content of PC and also can be negative: a. Relative addressing b. Immediate addressing c. Direct addressing d. Register addressing

Last Answer : a. Relative addressing

In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack

Description : In immediate addressing the operand is placed a. in the CPU register b. after OP code in the instruction c. in memory d. in stack

Last Answer : b. after OP code in the instruction

The most common addressing techiniques employed by a CPU is a. immediate b. direct c. indirect d. register e. all of the above

Description : The most common addressing techiniques employed by a CPU is a. immediate b. direct c. indirect d. register e. all of the above

Last Answer : e. all of the above

Which one of the following is not an addressing mode? (A) Register indirect (B) Auto increment (C) Relative indexed (D) Immediate operand

Description : Which one of the following is not an addressing mode? (A) Register indirect (B) Auto increment (C) Relative indexed (D) Immediate operand

Last Answer : (C) Relative indexed

Explain following instructions of 8051. (i) ADDC (ii) L CALL

Description : Explain following instructions of 8051. (i) ADDC (ii) L CALL

Last Answer : (i) ADDC: The ADDC instruction adds a byte value and the value of the carry flag to the accumulator. The results of the addition are stored back in the accumulator. Several of the flag ... . Then the program counter is loaded with the new address and control is transferred to the subroutine. 

List out features of any four addressing modes of 8051.

Description : List out features of any four addressing modes of 8051.

Last Answer : 1.Immediate addressing mode: In this Immediate Addressing Mode, the data is provided in the instruction itself. The data is provided immediately after the opcode. These are some examples of Immediate Addressing Mode. MOVA ... us see some examples of this mode. MOV 0E5H, @R0 MOV @R1, 80H

List the various addressing modes of DSPs.

Description : List the various addressing modes of DSPs.

Last Answer : Immediate Addressing Absolute Addressing Accumulator Addressing Direct Addressing Indirect Addressing Memory-Mapped Register Addressing Stack Addressing

Describe power down mode and ideal mode of 8051 with circuit diagram . which SFR is used to set these modes and draw the same.

Description : Describe power down mode and ideal mode of 8051 with circuit diagram . which SFR is used to set these modes and draw the same.

Last Answer : IDLE MODE In the Idle mode, the internal clock signal is gated off to the CPU, but not to the Interrupt, Timer and Serial Port functions. The CPU status is preserved in its entirety, the Stack Pointer, ... t change on chip RAM PCON (Power Control Register) SFR is used to set these modes.

Identify direct addressing instructions from following instructions : (i) MOV RO, R5 (ii) MOV RO, 80 H (iii) MOV RO, #75H (iv) ADD A, 45 H

Description : Identify direct addressing instructions from following instructions : (i) MOV RO, R5 (ii) MOV RO, 80 H (iii) MOV RO, #75H (iv) ADD A, 45 H

Last Answer : Instructions ii) and iv) are direct addressing as 80H and 45H are direct addresses

Explain the following instructions. SWAP A ADD C MUL AB CJNE A, add, radd MOV A, R0 MOVX A, @ A + DPTR.

Description : Explain the following instructions. SWAP A ADD C MUL AB CJNE A, add, radd MOV A, R0 MOVX A, @ A + DPTR.

Last Answer : SWAP A Description: This instruction exchanges bits 0-3 of the Accumulator with bits 4-7 of the Accumulator. This instruction is identical to executing "RR A" or "RL A four times ... referred to as the base address and the accumulator value is referred to as the index address.

Assume a two address format specified as source, destination. Examine the following sequence of instruction and explain the addressing modes used and the operation done in every instruction?

Description : Assume a two address format specified as source, destination. Examine the following sequence of instruction and explain the addressing modes used and the operation done in every instruction?

Last Answer : 1. Move (R5) +, R0 2. Add (R5) +, R0. 3. Move (R0), (R5) 4. Move 16(R5), R3 5. Add #40, R5

What is the use of addressing modes, mention the different types

Description : What is the use of addressing modes, mention the different types

Last Answer : The various formats of specifying the operands are called addressing modes, it is used to access the operands or data. The different types are as follows • Immediate addressing • Register addressing • Direct addressing • Indirect addressing • Implicit addressing

In length instruction some programs wants a complex instruction set containing more instruction, more addressing modes and greater address rang, as in case of a. RISC b. CISC c. Both d. None

Description : In length instruction some programs wants a complex instruction set containing more instruction, more addressing modes and greater address rang, as in case of a. RISC b. CISC c. Both d. None

Last Answer : b. CISC

IPv6 does not support which of the following addressing modes? a. unicast addressing b. multicast addressing c. broadcast addressing d. anycast addressing

Description : IPv6 does not support which of the following addressing modes? a. unicast addressing b. multicast addressing c. broadcast addressing d. anycast addressing

Last Answer : c. broadcast addressing

80386 support overall ___ addressing modes to facilitate efficient execution of higher level language programs. a) 9 b) 10 c) 11 d) 12

Description : 80386 support overall ___ addressing modes to facilitate efficient execution of higher level language programs. a) 9 b) 10 c) 11 d) 12

Last Answer : 11

Define Addressing Modes?

Description : Define Addressing Modes?

Last Answer : The different ways in which the operands of an instruction are specified are called as addressing modes. The MIPS addressing modes are the following: 1. Immediate addressing 2. Register addressing 3. Base or displacement addressing 4. PC-relative addressing 5. Pseudo direct addressing

Explain All The Addressing Modes Of The 8085 With The Help Of Examples.?

Description : Explain All The Addressing Modes Of The 8085 With The Help Of Examples.?

Last Answer : Answer :The various types of addressing modes of the 8085 are as follows: Direct addressing: The instructions in itself contain the opearand. For ex. STA5513H or in/out instructions such as IN PORT C. ... etc. Implicit addressing: this form of addressing contains no operands. For ex. RAR, CMA etc.

Name 5 Different Addressing Modes?

Description : Name 5 Different Addressing Modes?

Last Answer : Answer :Immediate, Direct, Register, Register indirect, Implied addressing modes.

Enlist any four addressing modes of 8086 microprocessor.

Description : Enlist any four addressing modes of 8086 microprocessor.

Last Answer : Addressing modes of 8086 : 1. Immediate 2. Direct 3. Register 4. Register indirect 5. Indexed 6. Register relative 7. Based indexed 8. Relative based indexed 9. Implied

Draw the format of PSW register of 8051 microcontroller and explain the function of each bit.

Description : Draw the format of PSW register of 8051 microcontroller and explain the function of each bit.

Last Answer : 1. CY: Carry flag. This flag is set whenever there is a carry out from the D7 bit after an 8 bit addition or subtraction. It can also be set to 1 or 0 directly by instructions such as SETB C and ... the A register contains an odd number of 1s, then P=1. P=0 if A has an even number of 1s.

Draw the format of SCON register.

Description : Draw the format of SCON register.

Last Answer : SM0 SCON.7 Serial port mode specifier SM1 SCON.6 Serial port mode specifier SM2 SCON.5 Used for multiprocessor communication (Make it 0.) REN SCON.4 Set/ cleared by software to enable/ ... flag. Set by hardware halfway through the stop bit time in mode 1. Must be cleared by software.

Describe serial communication in 8051. Explain the use of SCON register.

Description : Describe serial communication in 8051. Explain the use of SCON register.

Last Answer : 8051 micro controller communicate with another peripheral device through RXD and TXD pin of port3.controller have four mode of serial communication.  1. Serial Data Mode-0 (Baud Rate Fixed) In this mode ... .0 Receive interrupt flag. Set by hardware halfway through the stop bit time in mode 1. 

Draw the format of TCON register of 8051 and describe the function of each bit of it.

Description : Draw the format of TCON register of 8051 and describe the function of each bit of it.

Last Answer : TCON: TIMER/COUNTER CONTROL REGISTER.BIT ADDRESSABLE  TF1 TCON. 7 Timer 1 overflows flag. Set by hardware when the Timer/Counter 1 Overflows. Cleared by hardware as processor ... 0 type control bit. Set/cleared by software to Specify falling edge/low level triggered External Interrupt

In which addressing mode the operand is given explicitly in the instruction? A. Absolute B. Immediate C. Indirect D. Direct

Description : In which addressing mode the operand is given explicitly in the instruction? A. Absolute B. Immediate C. Indirect D. Direct

Last Answer : B. Immediate

Content of the program counter is added to the address part of the instruction in order to obtain the effective address is called_______ A. relative address mode. B. index addressing mode. C. register mode. D. implied mode.

Description : Content of the program counter is added to the address part of the instruction in order to obtain the effective address is called_______ A. relative address mode. B. index addressing mode. C. register mode. D. implied mode.

Last Answer : A. relative address mode.

The advantage of ............... is that it can reference memory without paying the price of having a full memory address in the instruction. (A) Direct addressing (B) Indexed addressing (C) Register addressing (D) Register Indirect addressing

Description : The advantage of ............... is that it can reference memory without paying the price of having a full memory address in the instruction. (A) Direct addressing (B) Indexed addressing (C) Register addressing (D) Register Indirect addressing

Last Answer : (D) Register Indirect addressing

The ............... addressing mode is similar to register indirect addressing mode, except that an offset is added to the contents of the register. The offset and register are specified in the instruction. (A) Base indexed (B) Base indexed plus displacement (C) Indexed (D) Displacement

Description : The ............... addressing mode is similar to register indirect addressing mode, except that an offset is added to the contents of the register. The offset and register are specified in the instruction. (A) Base indexed (B) Base indexed plus displacement (C) Indexed (D) Displacement

Last Answer : (D) Displacement

Define the term BUS related to microprocessor/controller and list different buses used in microcontroller.

Description : Define the term BUS related to microprocessor/controller and list different buses used in microcontroller.

Last Answer : BUS: A Bus is a set of physical connections used for communication between CPU and peripherals. Different buses used in microcontroller are: 1. Address Bus 2. Data Bus 3. Control Bus

List SFR in 8051.

Description : List SFR in 8051.

Last Answer : ACC and B registers - 8 bit each DPTR : [DPH:DPL] - 16 bit combined PC : Program Counter - 16 bits Stack pointer SP - 8 bit PSW : Program Status Word Port Latches ... , serial control Timer Registers (TCON,TMOD,TL0/1,TH0/1) Power control Interrupt Enable, Interrupt Priority

List specifications of 8051 microcontroller.

Description : List specifications of 8051 microcontroller.

Last Answer : 1) 8- bit data bus and 8- bit ALU. 2) 16- bit address bus - can access maximum 64KB of RAM and ROM. 3) On- chip RAM -128 bytes (Data Memory) 4) On- chip ROM - 4 KB ( ... 0592 MHz 9) Has power down and idle mode in microcontroller when no operation is performed. 10) Six interrupts are available.

In 8085, which of the following performs: load register pair immediate operation? (1) LDAX rp (2) LHLD addr (3) LXI rp, data (4) INX rp

Description : In 8085, which of the following performs: load register pair immediate operation? (1) LDAX rp (2) LHLD addr (3) LXI rp, data (4) INX rp

Last Answer : Answer: 3

State and explain the need of the following development tools microcontroller board: (i) Editor (ii) Assembler (iii) Compiler (iv) Linker

Description : State and explain the need of the following development tools microcontroller board: (i) Editor (ii) Assembler (iii) Compiler (iv) Linker

Last Answer : 1) Editor: An editor is a program which helps you to construct your assembly language program in right format so that the assembler will translate it correctly to machine language. So, you can type your ... . Some examples of linker are ASEM-51 BL51, Keil u Vision Debugger, LX 51 Enhanced Linker etc

Differentiate between (i) Harvard and Von-neuman architecture (ii) Microprocessor and Microcontroller

Description : Differentiate between (i) Harvard and Von-neuman architecture (ii) Microprocessor and Microcontroller

Last Answer : i) Harvard Architecture and Von-neuman architecture ii) Microprocessor and Microcontroller

Explain the use of following assembler directives. (i) EQU (ii) ORG

Description : Explain the use of following assembler directives. (i) EQU (ii) ORG

Last Answer : (i) EQU: Equate It is used to define constant without occupying a memory location. Syntax: Label EQU Numeric value By means of this directive, a numeric value is replaced by a symbol. For e.g. ... decimal. If the number is notfollowed by H, it is decimal and the assembler will convert it to hex.

Explain function of following pins of 8051 (i) Pin 31 (ii) Pin 29 (iii) Pin 21-28

Description : Explain function of following pins of 8051 (i) Pin 31 (ii) Pin 29 (iii) Pin 21-28 

Last Answer : i) Pin 31-EA : It is and active low I/P to 8051 microcontroller. When (EA)= 0, then 8051 microcontroller access from external program memory (ROM) only. When (EA) = 1, then it access internal ... /Output, when external memory is interfaced, PORT 2 pins act as the higher-order address bus. (A8-A15)

Which register keeps tracks of the instructions in the program stored in memory? A. Address Register B. Index Register C. Program Counter D. None of the Above

Description : Which register keeps tracks of the instructions in the program stored in memory? A. Address Register B. Index Register C. Program Counter D. None of the Above

Last Answer : C. Program Counter

Which control refers to the track of the address of instructions. a. Data control b. Register control c. Program control d. None of these

Description : Which control refers to the track of the address of instructions. a. Data control b. Register control c. Program control d. None of these

Last Answer : c. Program control

The Supdt may prescribe the use, in any Head or Sub office of a beat instruction register ______ for the purpose of communication addressees instructions to the postman a) M 32 b) M 34 c) M 28 d) None of these

Description : The Supdt may prescribe the use, in any Head or Sub office of a beat instruction register ______ for the purpose of communication addressees instructions to the postman a) M 32 b) M 34 c) M 28 d) None of these

Last Answer : a) M 32

Register is a 1) Set of capacitors used to register input instructions in a digital computer 2) Set of paper tapes and cards put in a file 3) Temporary storage unit within the CPU having dedicated or general purpose use 4) part of the auxiliary memory

Description : Register is a 1) Set of capacitors used to register input instructions in a digital computer 2) Set of paper tapes and cards put in a file 3) Temporary storage unit within the CPU having dedicated or general purpose use 4) part of the auxiliary memory

Last Answer : 3) Temporary storage unit within the CPU having dedicated or general purpose use

What will be the hexadecimal value in the register ax (32-bit) after executing the following instructions? Mov al, 15 Mov ah, 15 Xor al, al Mov cl, 3 Shr ax, cl Codes: (A) 0F00 h (B) 0F0F h (C) 01E0 h (D) FFFF h

Description : What will be the hexadecimal value in the register ax (32-bit) after executing the following instructions? Mov al, 15 Mov ah, 15 Xor al, al Mov cl, 3 Shr ax, cl Codes: (A) 0F00 h (B) 0F0F h (C) 01E0 h (D) FFFF h

Last Answer : (C) 01E0 h

The section of the CPU that selects, interprects and monitors the execution of program instructions is (1) Memory (2) Register (3) Control unit (4) ALU

Description : The section of the CPU that selects, interprects and monitors the execution of program instructions is (1) Memory (2) Register (3) Control unit (4) ALU

Last Answer : Control unit

Define IP Addressing. List IP Address classes with their range.

Description : Define IP Addressing. List IP Address classes with their range.

Last Answer : IP address: It is a unique logical address specified in the TCP/IP used to identify the host in a computer network. It can be a 32 bit address (IPv4) or a 128 bit address (IPv6). The IPv4 address include ... 1110 Class E: Class E is reserved for future use and its starting bits are 1111 

List various visibility modes used in inheritance.

Description : List various visibility modes used in inheritance.

Last Answer : Different visibility modes used in inheritance are: 1) Private 2) Protected 3) Public