Positive logic in a logic circuit is one in which

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Positive logic in a logic circuit is one in which logic 0 voltage level is lower than logic 1 voltage level.

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Logic state 0 in positive logic corresponds to

Description : Logic state 0 in positive logic corresponds to   1. zero voltage 2. positive voltage 3.higher voltage level 4. lower voltage level 

Last Answer : Logic state 0 in positive logic corresponds to lower voltage level 

Which one of the following logic circuit has the highest speed as compared to the currently available logic

Description : Which one of the following logic circuit has the highest speed as compared to the currently available logic circuits? A) Resistance-transistor logic B) Emitter-coupled logic C) Integrated-injection logic D) Diode-transistor logic 

Last Answer : Which one of the following logic circuit has the highest speed as compared to the currently available logic circuits? A) Resistance-transistor logic B) Emitter-coupled logic C) Integrated-injection logic D) Diode-transistor logic 

Define following terms related to logic families : (i) Noise Margin (ii) FAN-OUT (iii) Propagation delay (iv) Power dissipation

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The current mode logic (CML) is same as

Description : The current mode logic (CML) is same as A) LSI B) CMOS C) TTL D) ECL

Last Answer : The current mode logic (CML) is same as ECL

The following logic families have their propagation delay. Arrange them from lowest propagation delay to

Description : The following logic families have their propagation delay. Arrange them from lowest propagation delay to highest propagation delay. 1. TTL (Standard) 2. ECL 3. Low power CMOS 4. DTL (A) 2, 1, 4 and 3 (B) 2, 4, 1 and 3 (C) 4, 2, 3 and 1 (D) 1, 2, 3 and 4

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Read the following statements: i. Gate is a combinational logic. ii. JK Flip-flop in toggle mode is not

Description : Read the following statements: i. Gate is a combinational logic. ii. JK Flip-flop in toggle mode is not combinational logic. iii. MSJK Flip-flop suffers from race-around. iv. Counters are sequential circuits. Which choice is correct? (A) i, ii (B) i, ii, iv (C) ii, iii, iv (D) i, ii, iii

Last Answer : Read the following statements: i. Gate is a combinational logic. ii. JK Flip-flop in toggle mode is not combinational logic. iii. MSJK Flip-flop suffers from race-around. iv. Counters are sequential circuits. Which choice is ... (A) i, ii (B) i, ii, iv (C) ii, iii, iv (D) i, ii, iii

The complete set of only those Logic Gates designated as Universal Gates is

Description : The complete set of only those Logic Gates designated as Universal Gates is  (A) NOT, OR and AND Gates (B) XNOR, NOR and NAND Gates (C) NOR and NAND Gates (D) XOR, NOR and NAND Gates

Last Answer : The complete set of only those Logic Gates designated as Universal Gates is NOR and NAND Gates

The output Y of a 2-bit comparator is logic 1 whenever the 2-bit input A is greater than the 2-bit input B.

Description : The output Y of a 2-bit comparator is logic 1 whenever the 2-bit input A is greater than the 2-bit input B. The number of combinations for which the output is logic 1, is  (A) 4 (B) 6 (C) 8 (D) 10

Last Answer : The output Y of a 2-bit comparator is logic 1 whenever the 2-bit input A is greater than the 2-bit input B. The number of combinations for which the output is logic 1, is 6

When A = 0., B = 0, C = 1 then in two input logic gate we get gate

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Last Answer :  When A = 0., B = 0, C = 1 then in two input logic gate we get gate NAND gate

Which of the following circuits come under the class of sequential logic circuits ?

Description : Which of the following circuits come under the class of sequential logic circuits ?   P. Full adder   Q. Full subtractor   R. Half adder   S. JK flip   T. Counter   Select the correct answer from the codes given below: (a) P and Q (b) Q and R (c) R and S (d) S and T

Last Answer : Which of the following circuits come under the class of sequential logic circuits ?   P. Full adder   Q. Full subtractor   R. Half adder   S. JK flip   T. Counter   Select the correct answer from the codes given below: (a) P and Q (b) Q and R (c) R and S (d) S and T

What is not true in the context of “Don’t Care Condition” in digital logic ?

Description : What is not true in the context of “Don’t Care Condition” in digital logic ? (A) It corresponds to combination of logic variables whose value is not defined (B) It can be assumed to be 0 or 1 (C) It can be assumed to be 1 only (D) It helps in simplification of logic function

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Which of the following gates can be used to realize all possible combinational logic functions?

Description : Which of the following gates can be used to realize all possible combinational logic functions?  (i) OR gate (ii) NOR gate (iii) Exclusive OR gate (iv) NAND gate (v) AND gate  (A) (iii), (iv) and (v)  (B) (i), (iii) and (iv)  (C) (ii) and (iv)  (D) (i) and (v)

Last Answer : Which of the following gates can be used to realize all possible combinational logic functions?  (i) OR gate (ii) NOR gate (iii) Exclusive OR gate (iv) NAND gate (v) AND gate  (A) (iii), (iv) and (v)  (B) (i), (iii) and (iv)  (C) (ii) and (iv)  (D) (i) and (v)

Among the logic families, the family which can be used at very high ...

Description : Among the logic families, the family which can be used at very high frequency greater than 100 MHz in a 4 bit synchronous counter is

Last Answer : Among the logic families, the family which can be used at very high frequency greater than 100 MHz in a 4 bit synchronous counter is ECL.

A NAND gate is called a universal logic element because

Last Answer : A NAND gate is called a universal logic element because any logic function can be realized by NAND gates alone.

In a positive edge triggered JK flip-flop, J = 1, K = 0 and clock pulse is rising, Q will be

Description : In a positive edge triggered JK flip-flop, J = 1, K = 0 and clock pulse is rising, Q will be (a) 0 (b) 1 (c) showing no change (d) toggle 

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Determine the output frequency for a frequency division circuit that contains 12 flip–flops with an input

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How many flip-flops are required to build a binary counter circuit to count from 0 to 1023 ?

Description : How many flip-flops are required to build a binary counter circuit to count from 0 to 1023 ? (a) 1 (b) 6 (c) 10 (d) 23 

Last Answer : (c)10

For the circuit shown in figure, the Boolean expression for the output y in terms of inputs P, Q, R and S is

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Last Answer : For the circuit shown in figure, the Boolean expression for the output y in terms of inputs P, Q, R and S is P+Q+R+S

A switch tail ring counter is made by using a single D-FF. The resulting circuit is

Description : A switch tail ring counter is made by using a single D-FF. The resulting circuit is (A) T-FF (B) D-FF (C) SR-FF (D) JK-FF

Last Answer : A switch tail ring counter is made by using a single D-FF. The resulting circuit is T-FF

A debouncing circuit is

Last Answer : A debouncing circuit is a latch.

An oscillator circuit is mainly

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In integrated circuit electronics the basic universal gate is

Last Answer : In integrated circuit electronics the basic universal gate is AND gate.

In a positive logic system, logic state 1 corresponds to (A) positive voltage (B) higher voltage level (C) zero voltage level (D) lower voltage level

Description : In a positive logic system, logic state 1 corresponds to (A) positive voltage (B) higher voltage level (C) zero voltage level (D) lower voltage level

Last Answer : (B) higher voltage level We decide two voltages levels for positive digital logic. Higher voltage represents logic 1 & a lower voltage represents logic 0.

Logic is a ------------ science A) Positive B) Normative C) Descriptive D) Natural.

Description : Logic is a ------------ science A) Positive B) Normative C) Descriptive D) Natural. 

Last Answer :  B) Normative

Explain the logic circuit that is useful for interpreting mechanical language in human language ?

Description : Explain the logic circuit that is useful for interpreting mechanical language in human language ?

Last Answer : Decoder is the logic circuit that is useful for interpreting mechanical language in human language. A circuit that has a large number of inputs is called a decoder. The decoder is needed to make the information written in the code language in the output unit of the computer understandable to human.

What type of logic circuit is indicated by the truth table shown in the illustration? EL-0072 A. OR B. AND C. NOR D. NAND

Description : What type of logic circuit is indicated by the truth table shown in the illustration? EL-0072 A. OR B. AND C. NOR D. NAND

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In a logic circuit the NOR and NAND gate functions ____________. A. must be accomplished with a common base transistor arrangement B. are available in diode form C. are exact opposites with the same NOR and NAND inputs D. have output conditions that are exact opposites to the output condition for OR and AND, respectively

Description : In a logic circuit the NOR and NAND gate functions ____________. A. must be accomplished with a common base transistor arrangement B. are available in diode form C. are exact opposites with the ... . have output conditions that are exact opposites to the output condition for OR and AND, respectively

Last Answer : Answer: D

In a logic circuit, the NOT gate function _____________. A. does not alter a logical input B. serves to amplify a given signal level C. must be accomplished with a common collector transistor arrangement D. reverses an input logic condition

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If the outputs marked 'Q' of 'FF-A', 'FF-B' and 'FF-C' in the circuit shown in the illustration are at logic levels 0, 1, and 1 respectively, what levels are present at the 'NOT Q' outputs? EL-0087 A. 1, 0, and 1 B. 1, 0, and 0 C. 0, 0, and 1 D. 0, 1, and 1

Description : If the outputs marked 'Q' of 'FF-A', 'FF-B' and 'FF-C' in the circuit shown in the illustration are at logic levels 0, 1, and 1 respectively, what levels are present at the 'NOT Q' outputs? EL-0087 A. 1, 0, and 1 B. 1, 0, and 0 C. 0, 0, and 1 D. 0, 1, and 1

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Which control transfer passes the function viacontrol_ a Logic b. Operation ce. Circuit d. __ Allof these

Description : Which control transfer passes the function viacontrol_ a Logic b. Operation ce. Circuit d. __ Allof these

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Design a logic circuit to convert the BCD code to Excess –

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A full adder logic circuit will have (A) Two inputs and one output. (B) Three inputs and three outputs. (C) Two inputs and two outputs. (D) Three inputs and two outputs.

Description : A full adder logic circuit will have (A) Two inputs and one output. (B) Three inputs and three outputs. (C) Two inputs and two outputs. (D) Three inputs and two outputs.

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The first widely used commercial form of Artificial Intelligence (Al) is being used in many popular products like microwave ovens, automobiles and plug in circuit boards for desktop PCs. What is name of AI? A. Boolean logic B. Human logic C. Fuzzy logic D. Functional logic

Description : The first widely used commercial form of Artificial Intelligence (Al) is being used in many popular products like microwave ovens, automobiles and plug in circuit boards for desktop PCs. What is name of AI? A. Boolean logic B. Human logic C. Fuzzy logic D. Functional logic

Last Answer : C. Fuzzy logic 

Which of the following logic operations is performed by the following given combinational circuit ? Image (A) EXCLUSIVE-OR (B) EXCLUSIVE-NOR (C) NAND (D) NOR

Description : Which of the following logic operations is performed by the following given combinational circuit ?  (A) EXCLUSIVE-OR (B) EXCLUSIVE-NOR (C) NAND (D) NOR

Last Answer : (A) EXCLUSIVE-OR

Compare combinational logic circuit and sequential logic circuit

Description : Compare combinational logic circuit and sequential logic circuit

Last Answer : Combinational logic Sequential logic The combinational logic circuit consists of logic gate only Sequential logic circuit consists of combinational logic circuit along with memory for storage of ... , multiplexer, demultiplexer etc E.g. counters, shift registers flip-flop etc

A Gate is a logic circuit with one or more inputs, but only - - - output

Last Answer :  A Gate is a logic circuit with one or more inputs, but only One output

List out features of any four addressing modes of 8051.

Description : List out features of any four addressing modes of 8051.

Last Answer : 1.Immediate addressing mode: In this Immediate Addressing Mode, the data is provided in the instruction itself. The data is provided immediately after the opcode. These are some examples of Immediate Addressing Mode. MOVA ... us see some examples of this mode. MOV 0E5H, @R0 MOV @R1, 80H

List out any four assembler directives and state their functions.

Description : List out any four assembler directives and state their functions.

Last Answer : ORG directive: It is used to specify starting address of the Program. A 16bit address follows ORG ORG 0020H will start program from 0020H memory location.  END directive: It indicates end of the ... that when the label appears in the program, itp constant value will be substituted for the label.

State functions of preset, clear, clock and SR inputs related to SR flip flop.

Description : State functions of preset, clear, clock and SR inputs related to SR flip flop.

Last Answer : Preset Input: is an asynchronous input to set the Q output to 1 Clear Input: is also asynchronous input to reset the Q output to 0 Clock Input: is used to input external logic clock pulse (HIGH-LO) to ... set the Q output. And R is the reset input which is used to reset Q output of the flipflop.

State Demorgan's theorem's and prove both theorems using truth table.

Description : State Demorgan's theorem's and prove both theorems using truth table.

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Find out number of data lines required to interface 16 LEDs arrange in the 4 x 4 matrix form.

Description : Find out number of data lines required to interface 16 LEDs arrange in the 4 x 4 matrix form.

Last Answer : 4+4=8, eight lines are required for 4x4 matrix of 16 LEDs

If initial content of accumulator is 44 H, find out the new content of accumulator after execution of the instruction RR A

Description : If initial content of accumulator is 44 H, find out the new content of accumulator after execution of the instruction RR A

Last Answer : Contents of Acc will be 22H ( as RR A divides acc by 2)

Identify direct addressing instructions from following instructions : (i) MOV RO, R5 (ii) MOV RO, 80 H (iii) MOV RO, #75H (iv) ADD A, 45 H

Description : Identify direct addressing instructions from following instructions : (i) MOV RO, R5 (ii) MOV RO, 80 H (iii) MOV RO, #75H (iv) ADD A, 45 H

Last Answer : Instructions ii) and iv) are direct addressing as 80H and 45H are direct addresses

Define the term 'Multiplexer'. State two examples of multiplexer.

Description : Define the term 'Multiplexer'. State two examples of multiplexer.

Last Answer : A digital multiplexer or data selector is a logic circuit that accepts several (many) digital data inputs and selects one of them at any given time to pass on to the output. 1. Two input multiplexer 2. Four input multiplexer 3. Eight input multiplexer

The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’

Description : The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’ with one of the following conditions by applying A) J = 0, K = 0 and using a clock B) J = 1, K = 0 and using the clock C) Asynchronous preset input D) J = 1, K = 1 and using the clock 

Last Answer : The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’ with one of the following conditions by applying J = 1, K = 1 and using the clock 

What is the 2's complement of 01101?

Description : What is the 2's complement of 01101? A) 10010 B) 10011 C) 1100 D) 1001 

Last Answer : What is the 2's complement of 01101? A) 10010 B) 10011 C) 1100 D) 1001 

Which code is used in constructing k-maps?

Description : Which code is used in constructing k-maps?  A) Hamming code B) 2 out of 5 code C) BCD code D) Gray code 

Last Answer : Which code is used in constructing k-maps?  A) Hamming code B) 2 out of 5 code C) BCD code D) Gray code 

For a NAND gate, when one or more inputs are low then the output will be

Description :  For a NAND gate, when one or more inputs are low then the output will be A) Low B) High C) Alternately high and low D) High or low depending on relative magnitude of inputs 

Last Answer :  For a NAND gate, when one or more inputs are low then the output will be High