Description : Which microprocessor to read an item from memory: a. VAM b. SAM c. MOC d. None of these
Last Answer : b. SAM
Description : MAR stands for: a. Memory address register b. Memory address recode c. Micro address register d. None of these
Last Answer : a. Memory address register
Description : The information on the data bus is transferred to the ______register: a. MOC b. MDR c. VAM d. CPU
Last Answer : b. MDR
Description : In 8096, CCB bit 3 is ____. a) write strobe mode select b) address valid strobe select c) bus width select d) Internal read control mode
Last Answer : c) bus width select
Last Answer : b) address valid strobe select
Description : The first processor to include Virtual memory in the Intel microprocessor familywas: a.)80286 b.)80386c.)80486d.)Pentium
Last Answer : a.)80286
Description : A microprocessor retries instructions from : a. Control memory b. Cache memory c. Main memory d. Virtual memory
Last Answer : c. Main memory
Description : NMOS stands for: a. N-channel metal-oxide-semiconductor b. P-channel metal-oxide-semiconductor c. N-channel memory-oxide-semiconductor d. All the above
Last Answer : a. N-channel metal-oxide-semiconductor
Description : PMOS stands for: a. P-channel metal-oxide-semiconductor b. P-channel memory –oxide-semiconductor c. Both A and B d. None of these
Last Answer : a. P-channel metal-oxide-semiconductor
Description : CD-ROM stands for a. Compactable Read Only Memory b. Compact Data Read Only Memory c. Compactable Disk Read Only Memory d. Compact Disk Read Only Memory
Last Answer : d. Compact Disk Read Only Memory
Description : DMA stands for: a. Dynamic memory access b. Data memory access c. Direct memory access d. Both B and C
Last Answer : d. Both B and C
Description : DMA stands for: a. Direct memory access b. Direct memory allocation c. Data memory access d. Data memory allocation
Last Answer : a. Direct memory access
Description : MOC stands for: a. Memory operation complex b. Micro operation complex c. Memory operation complete d. None of these
Last Answer : c. Memory operation complete
Description : MDR stands for: a. Memory data register b. Memory data recode c. Micro data register d. None of these
Last Answer : a. Memory data register
Description : PROM stands for: a. Programmable read-only memory
Last Answer : a. Programmable read-only memory
Description : MOS stands for: a. Metal oxide semiconductor b. Memory oxide semiconductor c. Metal oxide select d. None of these
Last Answer : a. Metal oxide semiconductor
Description : Pentium Pro can address _____ of memory: a. 4 GB b. 128 GB c. 256 GB d. 512 GB
Last Answer : a. 4 GB
Description : When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is ... two data bytes stored in the top two locations of the stack are transferred to the stack pointer
Last Answer : c. two data bytes stored in the top two locations of the stack are transferred to the program counter
Description : How many address lines are needed to address each memory locations in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12
Last Answer : b. 11
Description : A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored
Last Answer : a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory.
Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory Address Register b. Memory Data Register c. Instruction Register d. Program Register
Last Answer : d. Program Register
Description : If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) a. doubles b. remains unchanged c. halves d. increases by 2^(address bits)/addressability
Last Answer : c. halves
Description : For a memory with a 16-bit address space, the addressability is a. 16 bits b. 8 bits c. 2^16 bits d. Cannot be determined
Last Answer : d. Cannot be determined
Description : A 32-bit address bus allows access to a memory of capacity(a) 64 Mb (b) 16 Mb (c) 1Gb (d) 4 Gb 2.Which processor structure is pipelined? a) all x80 processors b) all x85 processors c) all x86 processors
Last Answer : c) all x86 processors
Description : Registers, which are partially visible to users and used to hold conditional, are known as a. PC b. Memory address registers c. General purpose register d. Flags
Last Answer : c. General purpose register
Description : How many address lines are needed to address each memory location in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12
Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter
Last Answer : d. Program counter
Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address register b. Memory data register c. Instruction registers d. Program counter
Last Answer : c. Instruction registers
Description : A physical connection between the microprocessor memory and other parts of the m9crocomputer is known as a. Path b. Address bus c. Route d. All of the above
Last Answer : b. Address bus
Description : A memory that is capable of determining whether a given datum is contained in one of its address is a. ROM b. PROM c. CAM d. RAM
Last Answer : c. CAM
Description : A type of core store that has a lower access time than the devices used for working store in the same processor is known as a. Core memory b. Buffer c. Fast core d. Address register
Last Answer : d. Address register
Description : A storage area used to store data to a compensate for the difference in speed at which the different units can handle data is a. Memory b. Buffer c. Accumulator d. Address
Last Answer : b. Buffer
Description : Which of the following will happen when data is entered into a memory location? a. It will add to the content of the location b. It will change the address of the memory location c. It will erase the previous content d. It will not be fruitful if there is already some data at the location
Last Answer : c. It will erase the previous content
Description : Instructions and memory address are represented by a. Character code b. Binary codes c. Binary word d. Parity bit
Last Answer : b. Binary codes
Description : how many address lines are needed to address each machine location in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12
Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address registers b. Memory data registers c. Instruction register d. Program counter
Last Answer : c. Instruction register
Description : The lower red curvy arrow show that CPU places the address extracted from the memory location on the_____: a. Address bus b. System bus c. Control bus d. Data bus
Last Answer : a. Address bus
Description : Which register is connected to the memory by way of the address bus: a. MAR b. MDR c. SAM d. None of these
Last Answer : a. MAR
Description : Each memory location has: a. Address b. Contents c. Both A and B d. None of these
Last Answer : c. Both A and B
Description : ____ causes the address of the next microprocessor to be obtained from the memory: a. CRJA b. ROM c. MAP d. HLT
Last Answer : c. MAP
Description : 8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH 17. If the __ pin is ___ , then we have the option ... b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal
Last Answer : c) EA, high, external, internal
Description : 8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH
Last Answer : c) 2000 to 3FFFH
Description : The advantage of memory mapped I/O over I/O mapped I/O is, a) Faster b) Many instructions supporting memory mapped I/O c) Require a bigger address decoder d) All the above
Last Answer : d) All the above
Description : In transportation Problems, VAM stands for ......................... a. Value Addition Method b. Vogel’s Approximation Method c. Virgenean Approximation Method d. None of these
Last Answer : b. Vogel’s Approximation Method
Description : Which statement is valid about interpreter? a. It translates one instruction at a time b. Object code is saved for future use c. Repeated interpretation is not necessary d. All of above
Last Answer : a. It translates one instruction at a time
Description : Which statement is valid about computer program? a. It is understood by a computer b. It is understood by programmer c. It is understood user d. Both of above
Last Answer : d. Both of above
Description : Which statement is valid? a. 1KB = 1024 bytes b. 1 MB=2048 bytes c. 1 MB = 1000 kilobytes d. 1 KB = 1000 bytes
Last Answer : a. 1KB = 1024 bytes
Description : Which statement is valid about magnetic tape? a. It is a plastic ribbon b. It is coated on both sides with iron oxide c. It can be erased and reused d. All of above
Last Answer : a. It is a plastic ribbon
Description : The CPU sends out a ____ signal to indicate that valid data is available on the data bus: a. Read b. Write c. Both A and B
Last Answer : b. Write