Description : how many address lines are needed to address each machine location in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12
Last Answer : b. 11
Description : How many address lines are needed to address each memory locations in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12
Description : How many address lines are needed to address each machine location in a 2048 x 4 memory chip? A) 10 B) 11 C) 8 D) 12
Last Answer : Answer : B
Last Answer : 11
Description : How many address lines are needed to address each memory location in a 2048 x 4 memory chip? a. 10 b. 11 c. 8 d. 12
Description : How many address lines in a 4096 x 8 EPROM CHIP?
Last Answer : 12 address lines.
Description : The capacity of this chip is 1KB they are organized in the form of 1024 words with 8 bit word The what is the site of address bus: a. 8 bit b. 10 bit c. 12 bit d. 16 bit
Last Answer : b. 10 bit
Description : Which statement is wrong according to linear decoding : a. Address map is not contiguous. b. Confects occur if two of the select lines become active at the same time c. If all unused address lines are not used as chip selectors then these unused lines become don’t cares d. None of these
Last Answer : d. None of these
Description : Each memory location has: a. Address b. Contents c. Both A and B d. None of these
Last Answer : c. Both A and B
Description : A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored
Last Answer : a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory.
Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory Address Register b. Memory Data Register c. Instruction Register d. Program Register
Last Answer : d. Program Register
Description : Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory address register b. Memory data register c. Instruction register d. Program counter
Last Answer : d. Program counter
Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address register b. Memory data register c. Instruction registers d. Program counter
Last Answer : c. Instruction registers
Description : Which of the following will happen when data is entered into a memory location? a. It will add to the content of the location b. It will change the address of the memory location c. It will erase the previous content d. It will not be fruitful if there is already some data at the location
Last Answer : c. It will erase the previous content
Description : Which of the following registers is loaded with the contents of the memory location pointed by the PC? a. Memory address registers b. Memory data registers c. Instruction register d. Program counter
Last Answer : c. Instruction register
Description : The lower red curvy arrow show that CPU places the address extracted from the memory location on the_____: a. Address bus b. System bus c. Control bus d. Data bus
Last Answer : a. Address bus
Description : Which statement is valid? a. 1KB = 1024 bytes b. 1 MB=2048 bytes c. 1 MB = 1000 kilobytes d. 1 KB = 1000 bytes
Last Answer : a. 1KB = 1024 bytes
Description : Where does a computer add and compare data? a. Hard disk b. Floppy disk c. CPU chip d. Memory chip
Last Answer : c. CPU chip
Description : A plastic card similar to a credit card but having some memory and a microprocessor embedded within it is a. Punched paper tape b. Chip card c. Card punch
Last Answer : a. Punched paper tape
Description : The two major types of computer chips are a. External memory chip b. Primary memory chip c. Microprocessor chip d. Both b and c
Last Answer : d. Both b and c
Description : The magnetic storage chip used to provide non-volatile direct access storage of data and that have no moving parts are known as a. Magnetic core memory b. Magnetic tape memory c. Magnetic disk memory d. Magnetic bubble memory
Last Answer : a. Magnetic core memory
Description : The instructions for starting the computer are house on a. Random access memory b. CD-Rom c. Read only memory chip
Last Answer : c. Read only memory chip
Description : Because we wish to allow each ASCII code to occupy one location in memory, most memories are _____ addressable. a. BYTE b. NIBBLE c. WORD (16 bits) d. DOUBLEWORD (32 bits)
Last Answer : a. BYTE
Description : For a memory with a 16-bit address space, the addressability is a. 16 bits b. 8 bits c. 2^16 bits d. Cannot be determined
Last Answer : d. Cannot be determined
Description : Microprocessor 8085 can address location upto a. 32K b. 128K c. 64K d. 1M
Last Answer : c. 64K
Description : A name or number used to identify a storage location is called a. A byte b. A record c. An address d. All of above
Last Answer : c. An address
Description : A name or number used to identify a storage location devices? a. A byte b. A record c. An address d. All of above
Description : The SP is of ___ wide register. And this may be defined anywhere in the ______. a) 8 byte, on-chip 128 byte RAM. b) 8 bit, on chip 256 byte RAM. c) 16 bit,
Last Answer : a) 8 byte, on-chip 128 byte RAM.
Description : ROM d) 8 bit, on chip 128 byte RAM. 3. After reset, SP register is initialized to address________. a) 8H b) 9H c) 7H d) 6H
Last Answer : c) 7H
Description : In 8086 microprocessor , the address bus is ________ bit wide A. 12 bit B. 10 bit C. 16 bit D. 20 bit
Last Answer : In 8086 microprocessor, the address bus is 20 bit
Description : Pentium Pro can address _____ of memory: a. 4 GB b. 128 GB c. 256 GB d. 512 GB
Last Answer : a. 4 GB
Description : When the RET instruction at the end of subroutine is executed, a. the information where the stack is iniatialized is transferred to the stack pointer b. the memory address of the RET instruction is ... two data bytes stored in the top two locations of the stack are transferred to the stack pointer
Last Answer : c. two data bytes stored in the top two locations of the stack are transferred to the program counter
Description : If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) a. doubles b. remains unchanged c. halves d. increases by 2^(address bits)/addressability
Last Answer : c. halves
Description : A 32-bit address bus allows access to a memory of capacity(a) 64 Mb (b) 16 Mb (c) 1Gb (d) 4 Gb 2.Which processor structure is pipelined? a) all x80 processors b) all x85 processors c) all x86 processors
Last Answer : c) all x86 processors
Description : Registers, which are partially visible to users and used to hold conditional, are known as a. PC b. Memory address registers c. General purpose register d. Flags
Last Answer : c. General purpose register
Description : A physical connection between the microprocessor memory and other parts of the m9crocomputer is known as a. Path b. Address bus c. Route d. All of the above
Last Answer : b. Address bus
Description : A memory that is capable of determining whether a given datum is contained in one of its address is a. ROM b. PROM c. CAM d. RAM
Last Answer : c. CAM
Description : A type of core store that has a lower access time than the devices used for working store in the same processor is known as a. Core memory b. Buffer c. Fast core d. Address register
Last Answer : d. Address register
Description : A storage area used to store data to a compensate for the difference in speed at which the different units can handle data is a. Memory b. Buffer c. Accumulator d. Address
Last Answer : b. Buffer
Description : Instructions and memory address are represented by a. Character code b. Binary codes c. Binary word d. Parity bit
Last Answer : b. Binary codes
Description : Which register is connected to the memory by way of the address bus: a. MAR b. MDR c. SAM d. None of these
Last Answer : a. MAR
Description : VAM stands for: a. Valid memory address b. Virtual memory address c. Variable memory address d. None of these
Last Answer : a. Valid memory address
Description : MAR stands for: a. Memory address register b. Memory address recode c. Micro address register d. None of these
Last Answer : a. Memory address register
Description : ____ causes the address of the next microprocessor to be obtained from the memory: a. CRJA b. ROM c. MAP d. HLT
Last Answer : c. MAP
Description : 8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH 17. If the __ pin is ___ , then we have the option ... b) EA, low, internal, external c) EA, high, external, internal d) EA, low, external, internal
Last Answer : c) EA, high, external, internal
Description : 8096 write-protected mode, no code can write to memory address between __. a) 2020 to 3FFFH b) 8000 to FFFFH c) 2000 to 3FFFH d) 2020 to 202FH
Last Answer : c) 2000 to 3FFFH
Description : The advantage of memory mapped I/O over I/O mapped I/O is, a) Faster b) Many instructions supporting memory mapped I/O c) Require a bigger address decoder d) All the above
Last Answer : d) All the above
Description : 80386 support overall ___ addressing modes to facilitate efficient execution of higher level language programs. a) 9 b) 10 c) 11 d) 12
Description : The growth of SSI up to____: a. 100 device on a chip b. 200 device on a chip c. 300 device on a chip d. 400 device on a chip
Last Answer : a. 100 device on a chip