A 32 bit microprocessor has the word length equal to
a. 2 byte
b. 32 byte
c. 4 byte
d. 8 byte

1 Answer

Answer :

4 byte

Related questions

Description : A 32 bit microprocessor has the word length equal to A) 2 byte B) 32 byte C) 4 byte D) 8 byte

Last Answer : Answer : C

Description : A 32 bit microprocessor has the word length equal to a. 2 byte b. 32 byte c. 4 byte d. 8 byte

Last Answer : c. 4 byte

Description : A 32 bit microprocessor has the word length equal to a. 2 byte b. 32 byte c. 4 byte d. 8 byte

Last Answer : c. 4 byte

Description : Each station on an Ethernet network has a unique _______ address imprinted onits network interface card (NIC). A) 5-byte B) 32-bit C) 48-bit D) none of the above

Last Answer : 48-b

Last Answer : A 32 bit microprocessor has the word length equal to 4 bytes.

Description : An ICMP message has _____ headerand a variable-size data section. A) a 16-byte B) a 32-byte C) an 8-byte D) noneof the above

Last Answer : an 8-byte

Description : What is the size of the ‘total length’ field in IPv4 datagram? a. 4 bit b. 8 bit c. 16 bit d. 32 bit

Last Answer : c. 16 bit

Description : Length of Port address in TCP/IP is A. 8 bit long B. 4 bit long C. 32 bit long D. 16 bit long

Last Answer : D. 16 bit long

Description : Length of Port address in TCP/IP is a. 8 bit long b. 4 bit long c. 32 bit long d. 16 bit long

Last Answer : d. 16 bit long

Description : A byte consists of a. One bit b. Four bits c. Eight bits d. Sixteen bits

Last Answer : Eight bits

Description : A byte consists of a. One bit b. Four bits c. Eight bits d. Sixteen bits

Last Answer : Eight bits

Description : A band is always equivalent to a. a byte b. a bit c. 100 bits d. none of above

Last Answer : none of above

Description : The most common protocol for point-to-pointaccess is the Point-to-Point Protocol (PPP), which is a _________protocol. A) bit-oriented B) byte-oriented C) character-oriented D) none of the above

Last Answer : byte-oriented

Description : High-level Data Link Control (HDLC) is a _______ protocol for communication over point-to-pointand multipoint links. A) bit-oriented B) byte-oriented C) character-oriented D) none of the above

Last Answer : bit-oriented

Description : In______ transmission, wesend1 start bit (0) at thebeginningand 1 or more stop bits (1s) at the end of each byte. A) synchronous B) asynchronous C) isochronous D) none of the above

Last Answer : asynchronous

Description : Each ________in a SONET framecancarry a digitized voice channel. A) bit B) byte C) frame D) none of the above

Last Answer : byte

Description : The computer abbreviation KB usually means– (A) Key Block (B) Kernel Boot (C) Key Byte (D) Kit Bit (E) Kilo Byte

Last Answer : Kilo Byte

Description : Four channels are multiplexed using TDM. If each channel sends 100 bytes/second and we multiplex 1 byte per channel, then the bit rate for the link is __________. a. 400 bps b. 800 bps c. 1600 bps d. 3200 bps

Last Answer : d. 3200 bps

Description : What is the difference between the Ethernet frame preamble field and the IEEE 802.3 preamble and start of frame Delimiter fields? a. 1 byte b. 1 bit c. 4 bit d. 16 bit

Last Answer : a. 1 byte

Description : Station A uses 32 byte packets to transmit messages to Station B using a sliding window protocol. The round trip delay between A and B is 80 milliseconds and the bottleneck bandwidth on the path between A and B ... What is the optimal window size that A should use? a. 20 b. 40 c. 160 d. 320

Last Answer : b. 40

Description : The number of characters that can be stored in given physical space is a. Word length b. Byte c. Data density d. Field

Last Answer : Data density

Description : How many bit microprocessor developed by Intel: a. 4 bit b. 8 bit c. 32 bit d. 64 bit

Last Answer : b. 8 bit

Description : How many bit MC6800 microprocessor: a. 4-bit b. 8-bit c. 16-bit d. 32-bit

Last Answer : b. 8-bit

Description : How many bit microprocessor in the era marked beginning of fourth generation: a. 4 bit b. 8 bit c. 16 bit d. 32 bit

Last Answer : d. 32 bit

Description : How bit microprocessor inexpensive a separate interface is provided with I/O device: a. 2 bit b. 4 bit c. 8 bit d. 32 bit

Last Answer : c. 8 bit

Description : Consider a 32 - bit microprocessor, with a 16 - bit external data bus, driven by an 8 MHz input clock. Assume that the microprocessor has a bus cycle whose minimum duration equals four input clock cycles. What ... (A) 8x106 bytes/sec (B) 4x106 bytes/sec (C) 16x106 bytes/sec (D) 4x109 bytes/sec 

Last Answer : (B) 4x106 bytes/sec

Description : The intel 8086 microprocessor is a _______ processor A. 8 bit B. 16 bit C. 32 bit D. 4 bit

Last Answer : The intel 8086 microprocessor is a 16 bit processor 

Description : The next header t is an _____ field of Authentication Header that identifies the type of what follows. A. 16-bit B. 64-bit C. 8-bit D. 32-bit

Last Answer : C. 8-bit

Description : The unit of measurement of a word length is (1) Metre (2) Byte (3) Bit (4) Millimetre

Last Answer : Bit

Description : In IPv4, what is needed to determine thenumber of the last byte of a fragment? A) Identification number B) Offset number C) Total length D) (b) and (c)

Last Answer : (b) and (c)

Description : What is 32 bit microprocessor?

Last Answer : In computer architecture, 32-bit integers, memory addresses, or other data units are those that are at most 32 bits (4 octets) wide. Also, 32-bit CPU and ALU architecturesare those that are ... stored and manipulated internally in the processor as 32-bit quantities. For example, the Pentium Pro pr

Description : Calculator are based on______ microprocessor: a. 4 bit b. 16 bit c. 32 bit d. 64 bit

Last Answer : a. 4 bit

Description : How many bit microprocessor still survives in low-end application such as microwave ovens and small control system: a. 4 bit b. 16 bit c. 32 bit d. 64 bit

Last Answer : a. 4 bit

Description : In IPv6,a _________address comprises 80 bits of zero, followed by16 bitsof one, followed by the 32-bit IPv4address. A) link local B) site local C) mapped D) none of the above

Last Answer : mapped

Description : What is the size of an IP address? A. 64 bit B. 128 bit C. 16 bit D. 32 bit

Last Answer : D. 32 bit

Description : In hexadecimal colon notation, a 128-bit address isdivided into _______ sections, each _____hexadecimal digits in length. A) 8: 2 B) 8: 3 C) 8: 4 D) none of the above

Last Answer : 8: 4

Description : ____is used to control the cache with two new control bits not present in the 80386 microprocessor. What are the bits used to control the 8K byte cache? a) CR0, CD, NW b) CR0, NW, PWT c) Control Register Zero, PWT, PCD d) none

Last Answer : d) none

Description : The original ASCII code used__bits of each byte, reserving that last bit for error checking A) 5 B) 6 C) 7 D) 8

Last Answer : Answer : C

Description : The original ASCII code used…bits of each byte, reserving that last bit for error checking a. 5 b. 6 c. 7 d. 8

Last Answer : c. 7

Description : SP of 8051 is of ___ wide and it is loaded with the default value of ___ after reset. a) 2 byte, 08H b) 8 bit, 07H c) 1 byte, 09H d) 8 bit, 06H

Last Answer : d) 8 bit, 06H

Description : 8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, register ... c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register

Last Answer : c) 232 byte, five 8bit, register to register

Description : The SP is of ___ wide register. And this may be defined anywhere in the ______. a) 8 byte, on-chip 128 byte RAM. b) 8 bit, on chip 256 byte RAM. c) 16 bit,

Last Answer : a) 8 byte, on-chip 128 byte RAM.

Description : The 8051 microcontroller is of ___pin package as a ______ processor. a) 30, 1byte b) 20, 1 byte c) 40, 8 bit

Last Answer : c) 40, 8 bit

Description : In 8279, the keyboard entries are debounced and stored in an _________, that is further accessed by the CPU to read the key codes. a) 8-bit FIFO b) 8-byte FIFO c) 16 byte FIFO d) 16 bit FIFO

Last Answer : b) 8-byte FIFO

Description : 8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, ... c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register

Last Answer : d) 232 byte, six 8 bit, register to register

Description : ROM d) 8 bit, on chip 128 byte RAM. 3. After reset, SP register is initialized to address________. a) 8H b) 9H c) 7H d) 6H

Last Answer : c) 7H

Description : The 8051 microcontroller is of ___pin package as a ______ processor. a) 30, 1byte b) 20, 1 byte c) 40, 8 bit d) 40, 8 byte

Last Answer : c) 40, 8 bit

Description : The original ASCII code used…bits of each byte, reserving that last bit for error checking a. 5 b. 6 c. 7 d. 8

Last Answer : c. 7

Description : What is the probability that a randomly selected bit string of length 10 is a palindrome? (A) 1/64 (B) 1/32 (C) 1/8 (D) ¼

Last Answer : (B) 1/32

Description : Because we wish to allow each ASCII code to occupy one location in memory, most memories are _____ addressable. a. BYTE b. NIBBLE c. WORD (16 bits) d. DOUBLEWORD (32 bits)

Last Answer : a. BYTE