The SP is of ___ wide register. And this may be defined anywhere in the ______. a) 8 byte, on-chip 128 byte RAM. b) 8 bit, on chip 256 byte RAM. c) 16 bit,

The SP is of ___ wide register. And this may be defined anywhere in the ______. a) 8 byte, on-chip 128 byte RAM. b) 8 bit, on chip 256 byte RAM. c) 16 bit,
by

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Answer :

a) 8 byte, on-chip 128 byte RAM.
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ROM d) 8 bit, on chip 128 byte RAM. 3. After reset, SP register is initialized to address________. a) 8H b) 9H c) 7H d) 6H

Description : ROM d) 8 bit, on chip 128 byte RAM. 3. After reset, SP register is initialized to address________. a) 8H b) 9H c) 7H d) 6H

Last Answer : c) 7H

SP of 8051 is of ___ wide and it is loaded with the default value of ___ after reset. a) 2 byte, 08H b) 8 bit, 07H c) 1 byte, 09H d) 8 bit, 06H

Description : SP of 8051 is of ___ wide and it is loaded with the default value of ___ after reset. a) 2 byte, 08H b) 8 bit, 07H c) 1 byte, 09H d) 8 bit, 06H

Last Answer : d) 8 bit, 06H

8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, register to register c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register

Description : 8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, register ... c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register

Last Answer : c) 232 byte, five 8bit, register to register

8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, register to register c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register

Description : 8096 has following features fill up the following, i) ____ Register file, ii) ____ I/O Ports iii) ____ architecture. a) 256 byte, five 8bit, register to register b) 256 byte, four 8bit, ... c) 232 byte, five 8bit, register to register d) 232 byte, six 8 bit, register to register

Last Answer : d) 232 byte, six 8 bit, register to register

Intel 8096 is of ___ bit microcontroller family called as ______. a) 8, MCS51 b) 16, MCS51 c) 8, MCS96 d) 16, MCS96

Description : Intel 8096 is of ___ bit microcontroller family called as ______. a) 8, MCS51 b) 16, MCS51 c) 8, MCS96 d) 16, MCS96

Last Answer : d) 16, MCS96

Intel 8096 is of ___ bit microcontroller family called as ______. a) 8, MCS51 b) 16, MCS51 c) 8, MCS96 d) 16, MCS96

Description : Intel 8096 is of ___ bit microcontroller family called as ______. a) 8, MCS51 b) 16, MCS51 c) 8, MCS96 d) 16, MCS96

Last Answer : d) 16, MCS96

In linear decoding address bus of 16-bit wide can connect only ____ of RAM. a. 16 KB b. 6KB c. 12KB d. 64KB

Description : In linear decoding address bus of 16-bit wide can connect only ____ of RAM. a. 16 KB b. 6KB c. 12KB d. 64KB

Last Answer : b. 6KB

The 8051 microcontroller is of ___pin package as a ______ processor. a) 30, 1byte b) 20, 1 byte c) 40, 8 bit

Description : The 8051 microcontroller is of ___pin package as a ______ processor. a) 30, 1byte b) 20, 1 byte c) 40, 8 bit

Last Answer : c) 40, 8 bit

The 8051 microcontroller is of ___pin package as a ______ processor. a) 30, 1byte b) 20, 1 byte c) 40, 8 bit d) 40, 8 byte

Description : The 8051 microcontroller is of ___pin package as a ______ processor. a) 30, 1byte b) 20, 1 byte c) 40, 8 bit d) 40, 8 byte

Last Answer : c) 40, 8 bit

In 8279, the keyboard entries are debounced and stored in an _________, that is further accessed by the CPU to read the key codes. a) 8-bit FIFO b) 8-byte FIFO c) 16 byte FIFO d) 16 bit FIFO

Description : In 8279, the keyboard entries are debounced and stored in an _________, that is further accessed by the CPU to read the key codes. a) 8-bit FIFO b) 8-byte FIFO c) 16 byte FIFO d) 16 bit FIFO

Last Answer : b) 8-byte FIFO

A typical personal computer used for business purposes would have… of RAM. a. 4 KB b. 16 K c. 64 K d. 256 K

Description : A typical personal computer used for business purposes would have… of RAM. a. 4 KB b. 16 K c. 64 K d. 256 K

Last Answer : d. 256 K

The capacity of this chip is 1KB they are organized in the form of 1024 words with 8 bit word The what is the site of address bus: a. 8 bit b. 10 bit c. 12 bit d. 16 bit

Description : The capacity of this chip is 1KB they are organized in the form of 1024 words with 8 bit word The what is the site of address bus: a. 8 bit b. 10 bit c. 12 bit d. 16 bit

Last Answer : b. 10 bit

Pentium Pro can address _____ of memory: a. 4 GB b. 128 GB c. 256 GB d. 512 GB

Description : Pentium Pro can address _____ of memory: a. 4 GB b. 128 GB c. 256 GB d. 512 GB

Last Answer : a. 4 GB

A stack is a. an 8-bit register in the microprocessor b. a 16-bit register in the microprocessor c. a set of memory locations in R/WM reserved for storing information temporarily during the execution of computer

Description : A stack is a. an 8-bit register in the microprocessor b. a 16-bit register in the microprocessor c. a set of memory locations in R/WM reserved for storing information temporarily during the execution of computer

Last Answer : c. a set of memory locations in R/WM reserved for storing information temporarily during the execution of computer

How many bit of MAR register: a. 8-bit b. 16-bit c. 32-bit d. 64-bit

Description : How many bit of MAR register: a. 8-bit b. 16-bit c. 32-bit d. 64-bit

Last Answer : b. 16-bit

Suppose a digitized voice channel is made by digitizing 8 kHz bandwidth analog voice signal. It is required to sample the signal at twice the highest frequency (two samples per hertz). What is the bit rate required, if it is assumed that each sample requires 8 bits? (A) 32 kbps (B) 64 kbps (C) 128 kbps (D) 256 kbps

Description : Suppose a digitized voice channel is made by digitizing 8 kHz bandwidth analog voice signal. It is required to sample the signal at twice the highest frequency (two samples per hertz). What is the bit rate required, if it ... sample requires 8 bits? (A) 32 kbps (B) 64 kbps (C) 128 kbps (D) 256 kbps

Last Answer : (C) 128 kbps

The original ASCII code used…bits of each byte, reserving that last bit for error checking a. 5 b. 6 c. 7 d. 8

Description : The original ASCII code used…bits of each byte, reserving that last bit for error checking a. 5 b. 6 c. 7 d. 8

Last Answer : c. 7

A 32 bit microprocessor has the word length equal to a. 2 byte b. 32 byte c. 4 byte d. 8 byte

Description : A 32 bit microprocessor has the word length equal to a. 2 byte b. 32 byte c. 4 byte d. 8 byte

Last Answer : c. 4 byte

A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored

Description : A stack pointer is a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory. b. a register that decodes and executes 16-bit arithmetic expression. c. The first memory location where a subroutine address is stored. d. a register in which flag bits are stored

Last Answer : a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory.

The microprocessor can read/write 16 bit data from or to ________ A. memory B. I /O device C. processor D. register

Description : The microprocessor can read/write 16 bit data from or to ________ A. memory B. I /O device C. processor D. register

Last Answer : The microprocessor can read/write 16 bit data from or to memory 

In 8086 microprocessor , the address bus is ________ bit wide A. 12 bit B. 10 bit C. 16 bit D. 20 bit

Description : In 8086 microprocessor , the address bus is ________ bit wide A. 12 bit B. 10 bit C. 16 bit D. 20 bit

Last Answer : In 8086 microprocessor, the address bus is 20 bit

____is used to control the cache with two new control bits not present in the 80386 microprocessor. What are the bits used to control the 8K byte cache? a) CR0, CD, NW b) CR0, NW, PWT c) Control Register Zero, PWT, PCD d) none

Description : ____is used to control the cache with two new control bits not present in the 80386 microprocessor. What are the bits used to control the 8K byte cache? a) CR0, CD, NW b) CR0, NW, PWT c) Control Register Zero, PWT, PCD d) none

Last Answer : d) none

In 8051,After reset the SP register is initialized to address________. a. 8H b) 9H c) 7H

Description : In 8051,After reset the SP register is initialized to address________. a. 8H b) 9H c) 7H

Last Answer : c) 7H

Name of typical dedicated register is: a. PC b. IR c. SP d. All of these

Description : Name of typical dedicated register is: a. PC b. IR c. SP d. All of these

Last Answer : d. All of these

After reset, SP register is initialized to address________. a) 8H b) 9H c) 7H d) 6H

Description : After reset, SP register is initialized to address________. a) 8H b) 9H c) 7H d) 6H

Last Answer : c) 7H

What is the size of SP register in 8085 microprocessor?

Description :  What is the size of SP register in 8085 microprocessor? A) 16 bits B) 8 bits C) 64 bits D) 48 bits

Last Answer :  What is the size of SP register in 8085 microprocessor? A) 16 bits B) 8 bits C) 64 bits D) 48 bits

In 8096, mode ____ of serial port are ___ modes commonly used for ____ communications. a) 1, 8bit, single processor b) 0, 7bit, multiple microcontroller c) 2, 9 bit, multiple processors d) 3, 8 bit, multiple microcontroller

Description : In 8096, mode ____ of serial port are ___ modes commonly used for ____ communications. a) 1, 8bit, single processor b) 0, 7bit, multiple microcontroller c) 2, 9 bit, multiple processors d) 3, 8 bit, multiple microcontroller

Last Answer : a) 1, 8bit, single processor

In 8096, mode ____ of serial port are ___ modes commonly used for ____ communications. a) 1, 8bit, single processor b) 0, 7bit, multiple microcontroller c) 2, 9 bit, multiple processors d) 3, 8 bit, multiple microcontroller

Description : In 8096, mode ____ of serial port are ___ modes commonly used for ____ communications. a) 1, 8bit, single processor b) 0, 7bit, multiple microcontroller c) 2, 9 bit, multiple processors d) 3, 8 bit, multiple microcontroller

Last Answer : c) 2, 9 bit, multiple processors

_____ a subsystem that transfer data between computer components inside a computer or between computer: a. Chip b. Register c. Processor d. Bus

Description : _____ a subsystem that transfer data between computer components inside a computer or between computer: a. Chip b. Register c. Processor d. Bus

Last Answer : d. Bus

A byte consists of a. One bit b. Four bits c. Eight bits d. Sixteen bits

Description : A byte consists of a. One bit b. Four bits c. Eight bits d. Sixteen bits

Last Answer : c. Eight bits

How many bit stored by status register: a. 1 bit b. 4 bit c. 6 bit d. 8 bit

Description : How many bit stored by status register: a. 1 bit b. 4 bit c. 6 bit d. 8 bit

Last Answer : a. 1 bit

In 8087, _______ many register stack are there? And of _____ registers. These registers are used as _________ stack. a) 7, 40 bit, FIFO. b) 8, 60 bit, LILO. c) 8, 80 bit, LIFO d) 7, 80 bit, FILO.

Description : In 8087, _______ many register stack are there? And of _____ registers. These registers are used as _________ stack. a) 7, 40 bit, FIFO. b) 8, 60 bit, LILO. c) 8, 80 bit, LIFO d) 7, 80 bit, FILO.

Last Answer : b) 8, 60 bit, LILO.

Which of the following is of bit operations? i) SP ii) P2 iii) TMOD iv) SBUF v) IP a) ii, v only b) ii, iv, v only c) i, v only d) iii, ii only

Description : Which of the following is of bit operations? i) SP ii) P2 iii) TMOD iv) SBUF v) IP a) ii, v only b) ii, iv, v only c) i, v only d) iii, ii only

Last Answer : c) i, v only

Which of the following is of bit operations? i) SP ii) P2 iii) TMOD iv) SBUF v) IP a) ii, v only b) ii, iv, v only c) i, v only d) iii, ii only

Description : Which of the following is of bit operations? i) SP ii) P2 iii) TMOD iv) SBUF v) IP a) ii, v only b) ii, iv, v only c) i, v only d) iii, ii only

Last Answer : a) ii, v only

EBCDIC can code up to how many different characters? a. 256 b. 16 c. 32 d. 64

Description : EBCDIC can code up to how many different characters? a. 256 b. 16 c. 32 d. 64

Last Answer : a. 256

The coprocessors operate in ______ with a processor on the same buses and with the same instruction _______. a) Parallel, byte stream. b) Series, byte stream. c) Series, bite stream d) Parallel, bite stream.

Description : The coprocessors operate in ______ with a processor on the same buses and with the same instruction _______. a) Parallel, byte stream. b) Series, byte stream. c) Series, bite stream d) Parallel, bite stream.

Last Answer : a) Parallel, byte stream.

The ___ bit decides whether it is a system descriptor or code/data segment descriptor a) P b) S c) D d) G

Description : The ___ bit decides whether it is a system descriptor or code/data segment descriptor a) P b) S c) D d) G

Last Answer : a) P

Because we wish to allow each ASCII code to occupy one location in memory, most memories are _____ addressable. a. BYTE b. NIBBLE c. WORD (16 bits) d. DOUBLEWORD (32 bits)

Description : Because we wish to allow each ASCII code to occupy one location in memory, most memories are _____ addressable. a. BYTE b. NIBBLE c. WORD (16 bits) d. DOUBLEWORD (32 bits)

Last Answer : a. BYTE

The external device is connected to a pin called the ______ pin on the processor chip. a. Interrupt b. Transfer c. Both d. None of these

Description : The external device is connected to a pin called the ______ pin on the processor chip. a. Interrupt b. Transfer c. Both d. None of these

Last Answer : a. Interrupt

8096 has ___ general purpose I/O ports, Port 2 includes ______ of the following i) two quasi-bidirectional I/O lines ii) two output lines iii) four input lines iv) open drain outputs a) 4, i, iv b) 6, ii, iii c) 4, i,ii,iii d) 6, i, ii, iv

Description : 8096 has ___ general purpose I/O ports, Port 2 includes ______ of the following i) two quasi-bidirectional I/O lines ii) two output lines iii) four input lines iv) open drain outputs a) 4, i, iv b) 6, ii, iii c) 4, i,ii,iii d) 6, i, ii, iv

Last Answer : c) 4, i,ii,iii

8096 has ___ general purpose I/O ports, Port 2 includes ______ of the following i) two quasi-bidirectional I/O lines ii) two output lines iii) four input lines iv) open drain outputs a) 4, i, iv b) 6, ii, iii c) 4, i,ii,iii d) 6, i, ii, iv

Description : 8096 has ___ general purpose I/O ports, Port 2 includes ______ of the following i) two quasi-bidirectional I/O lines ii) two output lines iii) four input lines iv) open drain outputs a) 4, i, iv b) 6, ii, iii c) 4, i,ii,iii d) 6, i, ii, iv

Last Answer : c) 4, i,ii,iii

Which processor provided 1 MB memory: a. 16-bit 8086 and 8088 b. 32-bit 8086 and 8088 c. 64-bit 8086 and 8088 d. 8-bit 8086 and 8088

Description : Which processor provided 1 MB memory: a. 16-bit 8086 and 8088 b. 32-bit 8086 and 8088 c. 64-bit 8086 and 8088 d. 8-bit 8086 and 8088

Last Answer : a. 16-bit 8086 and 8088

How many bit MC6800 microprocessor: a. 4-bit b. 8-bit c. 16-bit d. 32-bit

Description : How many bit MC6800 microprocessor: a. 4-bit b. 8-bit c. 16-bit d. 32-bit

Last Answer : b. 8-bit

How many bit microprocessor in the era marked beginning of fourth generation: a. 4 bit b. 8 bit c. 16 bit d. 32 bit

Description : How many bit microprocessor in the era marked beginning of fourth generation: a. 4 bit b. 8 bit c. 16 bit d. 32 bit

Last Answer : d. 32 bit

Third generation microprocessor is dominated by____ microprocessor: a. 8 bit b. 4 bit c. 16 bit d. 64 bit

Description : Third generation microprocessor is dominated by____ microprocessor: a. 8 bit b. 4 bit c. 16 bit d. 64 bit

Last Answer : c. 16 bit

The beginning of very efficient____ microprocessor in second generation: a. 4-bit b. 8-bit c. 16-bit d. 64-bit

Description : The beginning of very efficient____ microprocessor in second generation: a. 4-bit b. 8-bit c. 16-bit d. 64-bit

Last Answer : b. 8-bit

For a memory with a 16-bit address space, the addressability is a. 16 bits b. 8 bits c. 2^16 bits d. Cannot be determined

Description : For a memory with a 16-bit address space, the addressability is a. 16 bits b. 8 bits c. 2^16 bits d. Cannot be determined

Last Answer : d. Cannot be determined

The intel 8086 microprocessor is a _______ processor A. 8 bit B. 16 bit C. 32 bit D. 4 bit

Description : The intel 8086 microprocessor is a _______ processor A. 8 bit B. 16 bit C. 32 bit D. 4 bit

Last Answer : The intel 8086 microprocessor is a 16 bit processor 

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Description : A collection of 8 bits is called a. byte b. word c. record

Last Answer : a. byte