Description : Each instruction is also accompanied by a___ : a. Microprocessor b. Microcode c. Both d. None of these
Last Answer : b. Microcode
Description : __is divided into a number of fields and is represented as a sequence of bits: a. instruction b. — instruction set c. instruction code d. parity code
Last Answer : a. instruction
Description : In program control the instruction is set for the statement in a: a. Parallel b. Sequence c. Both d. None
Last Answer : b. Sequence
Description : Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU
Last Answer : b. Main memory
Description : Ininstruction formats the information required by the _ for execution: a. ALU b. CPU Cc. RISC d. DATA
Last Answer : b. CPU
Description : Which instruction are 32 bits long , with extra 16 bits. a. Memory reference instruction b. Memory reference format c. Both d. None of these
Last Answer : a. Memory reference instruction
Description : Assembler is a___ a. Interpreter b. Translator c. Exchanger d. None of these
Last Answer : b. Translator
Description : In post-indexing the contents of the address field are used to access a memory location containing a___ address: Immediate addressing Direct addressing Register addressing ao | None of these
Last Answer : Direct addressing
Description : Which section is basically a sequence of instruction with a clear indication of beginning and end for updating shared variables. a. Racing section b. Critical section c. d. Both None of thes
Last Answer : . Critical sectio
Description : The simplest method of controlling sequence of instruction execution is to have each instruction explicitly specify: a. The address of next instruction to be run b. Address of previous instruction c. Both a &b d. None of these
Last Answer : a. The address of next instruction to be run
Description : Which instruction are arranged as per the protocols of memory reference format of the input file in a simple ASCII sequence of integers between the range O to 99 separated by spaces without formatted text ... : a. Memory reference instruction b. Memory reference format c. Both d. None of these
Description : is an external hardware event which causes the CPU to interrupt the current instruction sequence: a. Input interrupt b. Output interrupt c. Both d. None of these
Last Answer : c. Both
Description : As the instruction length increases ————_ of instruction addresses in all the instruction is_ a. Implicit inclusion b. Implicit and disadvantageous c. Explicit and disadvantageous d. Explicit and disadvantageous
Last Answer : c. Explicit and disadvantageous
Description : The instruction fetch operation is initiated by loading the contents of program counter into the and sends _ request to memory: a. Memory register and read b. Memory register and write c. Data register and read d. Address register and read
Last Answer : d. Address register and read
Description : In second pass, assembler creates _ in binary format for every instruction in program and then refers to the symbol table to giving every symbol an_ _ relating the segment. a. Code and program b. Program and instruction c. Code and offset d. All of these
Last Answer : c. Code and offset
Description : When subroutine is called contents of program counter is location address of __ instruction following call instruction is stored on _ __and program execution is transferred to __ address. a. Non ... , Stack and Main program Cc. Executable, Queue and Subroutine d. Executable, Stack and Subroutine
Last Answer : d. Executable, Stack and Subroutine
Description : One of use of microprogramming to implement _ ____ of processor in Intel 80x86 and Motorola 680x0 processors whose instruction set are evolved from 360 original. a. Control structure b. Without control c. Control unit d. Only control
Last Answer : c. Control unit
Description : Decoding of an instruction in RISC architecture means decision on working of control unit for: a. Remainder of instructions b. _ Divisor of instructions c. Dividend of instructions d. None of these
Last Answer : a. Remainder
Description : Which instruction are used in multithreaded parallel processor architecture. a. Memory reference instruction b. Memory reference format c. Both d. None of these
Description : __is the sequence of operations performed by CPU in processing an instruction: a. Execute cycle b. Fetch cycle c. Decode d. Instruction cycle
Last Answer : d. Instruction cycle
Description : The front panel display provides lights as green LED represent sand red LED represent _ for device programmer who writes input/output basic: a. Busy and Error b. Error and Busy c. Busy and Busy d. Error and Error
Last Answer : a. Busy and Error
Description : By defining the _ __ register as last in first out stack the sequence can handle nested subroutines: a. S b. J ce. R d. T
Last Answer : ce. R
Description : Which operation are binary type, and are performed on bits string that is placed in register: a. Logical micro operation b. Arithmetic micro operation c. Both d. None
Last Answer : a. Logical micro operation
Description : The bits are shifted and the first flip-flop receives its binary information from the____ a. Serial output b. Serial input c. Both d. None
Last Answer : b. Serial input
Description : is the step during which the operations specified by the instruction are executed: a. Execute b. Decode c. Both a& b d. None of these
Last Answer : a. Execute
Description : Execution of instruction specified by instruction to perform: a. Operation b. Operands c. Both a &b d. None of these
Last Answer : a. Operation
Description : Which unit is necessary for the execution of instruction: a. Timing b. Control ce. Both d. None of these
Last Answer : ce. Both
Description : Which are instruction in which two machine cycle are required: a. Instruction cycle b. Memory reference instruction c. Both d. None of these
Last Answer : b. Memory reference instruction
Description : The length of instruction set depends on: a. Data size b. Memory size c. Both d. None
Last Answer : b. Memory size
Description : In length instruction some programs wants a complex instruction set containing more instruction, more addressing modes and greater address rang, as in case of a. RISC b. CISC c. Both d. None
Last Answer : b. CISC
Description : In length instruction other programs on the other hand, want a small and fixed-size instruction set that contains only a limited number of opcodes, as in case of a. RISC b CISC c. Both d. None
Last Answer : a. RISC
Description : The instruction set can have variable-length instruction format primarily due to: a. Varying number of operands b. Varying length of opcodes in some CPU ce. Both d. None
Description : An instruction code must specify the address of the__. a. Opecode b. Operand c. Both d. None
Last Answer : b. Operand
Description : Arithmetic instruction are used to perform operation on: a. Numerical data b. Non-numerical data c. Both d. None
Last Answer : a. Numerical data
Description : Which processor has a single instruction multiple data stream organization that manipulates the common instruction by means of multiple functional units. a. Attached array processor b. SIMD array processor c. Both d. None
Last Answer : b. SIMD array processor
Description : Which are the types of important ideas to notice about these odometer readings: a. The MSB is the sign bit .O for a +sign and 1 for a— sign b. The negative number represent the 2’s complement of the positive number c. Both d. __ Allof these
Description : Which code used to represent numbers, letters, punctuation marks as well as control characters: a. ASCII b. EBCDIC c. Both d. None of these
Last Answer : a. ASCII
Description : A binary number with 8 bits is called asa___ a. Bytes b. Bits c. Nibble d. __ Allof these
Last Answer : a. Bytes
Description : Which number is formed from a binary number by grouping bits in groups of 4-bit each starting at the binary point: a. Binary b. Octal c. Decimal d. Hexadecimal
Last Answer : d. Hexadecimal
Description : How many bits of mantissa : a. 4 b. 8 ec. 10 d. 16
Last Answer : ec. 10
Description : Group of binary bits(0&1) is known as: a. Binary code b. Digit code
Last Answer : a. Binary code
Description : A group of 4 binary bits is called. a. Nibble b. Byte c. Decimal d. Digit
Last Answer : a. Nibble
Description : Which method is used to detect double errors and pinpoint erroneous bits. a. Even parity method b. Odd parity method c. Check sum method. d. All of these
Last Answer : c. Check sum method.
Description : Each check bit is grouped with the information bits as specified by a__ a. Parity check code b. Parity check matrix c. Parity check bit d. All of these
Last Answer : b. Parity check matrix
Description : The _stack can be 4-word memory addressed by 2 bits from an up/down counter known as the stack pointer: a. FIFO b. PIPO c. SISO d. LIFO
Last Answer : d. LIFO
Description : Various machine level components are: a. Address register > Program counter c Data register d. Accumulator register e. Memory of 2K,16 bits/word RAM f. Multiplexers g. Allof these
Last Answer : g. Allof these
Description : How many bits of OPR select one of the operations in the ALU: a. 2 b 3 Cc. 4 dad 5
Last Answer : dad 5
Description : five bits of OPR select one of the operation inthe __ in control register. a. CPU b. RISC ec ALU d. MUX
Last Answer : ec ALU
Description : Which operation is used to shift the content of an operand to one or more bits to provide necessary variation: a. Logical and bit manipulation b. Shift manipulation c. Circular manipulation d. None of these
Last Answer : b. Shift manipulation
Description : Two important fields of an instruction are. a. Opcode b. Operand c. Only a d. Botha&b
Last Answer : d. Botha&b