The instruction set can have variable-length instruction format primarily due to:
a. Varying number of operands
b. Varying length of opcodes in some CPU
ce. Both
d. None

1 Answer

Answer :

ce. Both

Related questions

Description : In length instruction other programs on the other hand, want a small and fixed-size instruction set that contains only a limited number of opcodes, as in case of a. RISC b CISC c. Both d. None

Last Answer : a. RISC

Description : Execution of instruction specified by instruction to perform: a. Operation b. Operands c. Both a &b d. None of these

Last Answer : a. Operation

Description : specify where to get the source and destination operands for the operation specified by the a. Operand fields and opcode b. Opcode and operand c. Source and destination d. Cpu and memory

Last Answer : a. Operand fields and opcode

Description : Which unit is necessary for the execution of instruction: a. Timing b. Control ce. Both d. None of these

Last Answer : ce. Both

Description : Which types of jump keeps a 2_byte instruction that holds the range from- 128to127 bytes in the memory location: a. Far jump b. Near jump ce. Short jump d. __ Allof these

Last Answer : ce. Short jump

Description : which are of these examples of Intel 8086 opcodes: a. MOV b. ADD c. SUB d. All of these

Last Answer : d. All of these

Description : is an external hardware event which causes the CPU to interrupt the current instruction sequence: a. Input interrupt b. Output interrupt c. Both d. None of these

Last Answer : c. Both

Description : Which instruction are 32 bits long , with extra 16 bits. a. Memory reference instruction b. Memory reference format c. Both d. None of these

Last Answer : a. Memory reference instruction

Description : Which instruction are used in multithreaded parallel processor architecture. a. Memory reference instruction b. Memory reference format c. Both d. None of these

Last Answer : a. Memory reference instruction

Description : Which instruction are arranged as per the protocols of memory reference format of the input file in a simple ASCII sequence of integers between the range O to 99 separated by spaces without formatted text ... : a. Memory reference instruction b. Memory reference format c. Both d. None of these

Last Answer : a. Memory reference instruction

Description : In length instruction some programs wants a complex instruction set containing more instruction, more addressing modes and greater address rang, as in case of a. RISC b. CISC c. Both d. None

Last Answer : b. CISC

Description : The length of instruction set depends on: a. Data size b. Memory size c. Both d. None

Last Answer : b. Memory size

Description : The source/destination of operands can be the_ or one of the general-purpose register: a. Memory b. One c. both d. None of these

Last Answer : a. Memory

Description : __is the sequence of operations performed by CPU in processing an instruction: a. Execute cycle b. Fetch cycle c. Decode d. Instruction cycle

Last Answer : d. Instruction cycle

Description : sis given an instruction in machine language this instruction is fetched from the memory by the CPU to execute: a. ALU b. CPU c. MU d. All of these

Last Answer : b. CPU

Description : Which cycle refers to the time period during which one instruction is fetched and executed by the CPU: a. Fetch cycle b. Instruction cycle c. Decode cycle d. Execute cycle

Last Answer : b. Instruction cycle

Description : Which is the most important component of a digit computer that interprets the instruction and processes the data contained in computer programs: MU b. ALU c. CPU d. PC

Last Answer : c. CPU

Description : Modern assemblers for RISC based architectures make optimization of instruction scheduling to make use of CPU __ efficiently: a. Pipeline b. Without pipeline c. Botha &b d. None of these

Last Answer : a. Pipeline

Description : Instruction formats contains the memory address of the a. Memory data b. Main memory Cc. CPU d. ALU

Last Answer : b. Main memory

Description : Which are contains one or more register that may be referenced by machine instruction: a. Input b. Output c. CPU d. ALU

Last Answer : c. CPU

Description : In second pass, assembler creates _ in binary format for every instruction in program and then refers to the symbol table to giving every symbol an_ _ relating the segment. a. Code and program b. Program and instruction c. Code and offset d. All of these

Last Answer : c. Code and offset

Description : Ingiven lines of code MOV AX,BL have different type of operands according to assembler for 8086 architecture these identifiers must be of. a. Different type only in byte b. Same type either in word or byte c. Botha &b d. None of these

Last Answer : b. Same type either in word or byte

Description : The number of bit required to express and ___ are determined by the accuracy desired from the computing system . a. Exponent b. Mantissa ce. Both d. None f these

Last Answer : ce. Both

Description : Which is a type of microprocessor that is designed with limited number of instructions: a. CISC b. RISC ce. Both d. None

Last Answer : ce. Both

Description : In program control the instruction is set for the statement in a: a. Parallel b. Sequence c. Both d. None

Last Answer : b. Sequence

Description : Complement the subtrahend by converting all annddall a. 1’s to 0’s b. 0’s to 1’s ce. Both d. None of these

Last Answer : ce. Both

Description : Which operation are done by increment or decrement the stack pointer: a. Push b. Pop ce. Both d. None

Last Answer : ce. Both

Description : __is divided into a number of fields and is represented as a sequence of bits: a. instruction b. — instruction set c. instruction code d. parity code

Last Answer : a. instruction

Description : Abinary number with 4 bitsiscalleda_ a. Bit b. Bytes ce. Nibble d. None of these

Last Answer : ce. Nibble

Description : How many main sign number binary codes are used: a. 4 b 65 ce. 3 d. 6

Last Answer : ce. 3

Description : As the instruction length increases ————_ of instruction addresses in all the instruction is_ a. Implicit inclusion b. Implicit and disadvantageous c. Explicit and disadvantageous d. Explicit and disadvantageous

Last Answer : c. Explicit and disadvantageous

Description : The complete set of op-codes for a particular microprocessor defines the_ set for that processor: a. Code b. Function c. Module d. Instruction

Last Answer : d. Instruction

Description : Each instruction is executed by set of micro operations termed as. a. Micro instructions b. Mini instructions c. Botha &b d. None of these

Last Answer : a. Micro instructions

Description : One of use of microprogramming to implement _ ____ of processor in Intel 80x86 and Motorola 680x0 processors whose instruction set are evolved from 360 original. a. Control structure b. Without control c. Control unit d. Only control

Last Answer : c. Control unit

Description : In data transfer manipulation designing as instruction set for a system isa complex_ a. Art b. System Cc. Computer d. None of these

Last Answer : a. Art

Description : In memory read the operation puts memory address on to a register known as : a. PC b. ALU ce. MAR d. — Allof these

Last Answer : ce. MAR

Description : Which control transfer passes the function viacontrol_ a Logic b. Operation ce. Circuit d. __ Allof these

Last Answer : ce. Circuit

Description : isa__ expression which will have value true or false. a. Relational b. Logical ce. Botha&b d. None of these

Last Answer : ce. Botha&b

Description : By defining the _ __ register as last in first out stack the sequence can handle nested subroutines: a. S b. J ce. R d. T

Last Answer : ce. R

Description : Which section is basically a sequence of instruction with a clear indication of beginning and end for updating shared variables. a. Racing section b. Critical section c. d. Both None of thes

Last Answer : . Critical sectio

Description : The simplest method of controlling sequence of instruction execution is to have each instruction explicitly specify: a. The address of next instruction to be run b. Address of previous instruction c. Both a &b d. None of these

Last Answer : a. The address of next instruction to be run

Description : is the step during which the operations specified by the instruction are executed: a. Execute b. Decode c. Both a& b d. None of these

Last Answer : a. Execute

Description : Which are instruction in which two machine cycle are required: a. Instruction cycle b. Memory reference instruction c. Both d. None of these

Last Answer : b. Memory reference instruction

Description : Each instruction is also accompanied by a___ : a. Microprocessor b. Microcode c. Both d. None of these

Last Answer : b. Microcode

Description : In instruction formats instruction is represent by a___ _ of bits: a. Sequence b. Parallel c. Both d. None

Last Answer : a. Sequence

Description : An instruction code must specify the address of the__. a. Opecode b. Operand c. Both d. None

Last Answer : b. Operand

Description : Arithmetic instruction are used to perform operation on: a. Numerical data b. Non-numerical data c. Both d. None

Last Answer : a. Numerical data

Description : Which processor has a single instruction multiple data stream organization that manipulates the common instruction by means of multiple functional units. a. Attached array processor b. SIMD array processor c. Both d. None

Last Answer : b. SIMD array processor

Description : In 1-address format how many address is used both as source as well as destination: a. b. 9 a 1 2 3 4

Last Answer : 1

Description : A byte addressable computer has a memory capacity of 2 m Kbytes and can perform 2 n operations. An instruction involving 3 operands and one operator needs a maximum of (A) 3m bits (B) m + n bits (C) 3m + n bits (D) 3m + n + 30 bits

Last Answer : (D) 3m + n + 30 bits