IBM-360 type language is example which supporting _—___—sJanguage. a. Micro b. Macro c. Botha &b d. None of these

IBM-360 type language is example which supporting _—___—sJanguage.

a. Micro
b. Macro
c. Botha &b
d. None of these
by

1 Answer

Answer :

b. Macro
by

Related questions

Each instruction is executed by set of micro operations termed as. a. Micro instructions b. Mini instructions c. Botha &b d. None of these

Description : Each instruction is executed by set of micro operations termed as. a. Micro instructions b. Mini instructions c. Botha &b d. None of these

Last Answer : a. Micro instructions

which of the 2 files are created by the assembler. a. _ List and object file b. Link and object file c. Botha &b d. None of these

Description : which of the 2 files are created by the assembler. a. _ List and object file b. Link and object file c. Botha &b d. None of these

Last Answer : a. _ List and object file

shave addresses where instructions are stored along with address of working storage: a. _ Relative entities b. Absolute entities c. Botha &b d. None of these

Description : shave addresses where instructions are stored along with address of working storage: a. _ Relative entities b. Absolute entities c. Botha &b d. None of these

Last Answer : a. _ Relative entities

Ingiven lines of code MOV AX,BL have different type of operands according to assembler for 8086 architecture these identifiers must be of. a. Different type only in byte b. Same type either in word or byte c. Botha &b d. None of these

Description : Ingiven lines of code MOV AX,BL have different type of operands according to assembler for 8086 architecture these identifiers must be of. a. Different type only in byte b. Same type either in word or byte c. Botha &b d. None of these

Last Answer : b. Same type either in word or byte

In protocol each process can make a request onlyinan a. Increasing order b. Decreasing order c. Botha &b d. None of these

Description : In protocol each process can make a request onlyinan a. Increasing order b. Decreasing order c. Botha &b d. None of these

Last Answer : a. Increasing order

Which state refers to a state that is not safe not necessarily a deadlocked state. a. Safe state b. Unsafe state c. Botha &b d. None of these

Description : Which state refers to a state that is not safe not necessarily a deadlocked state. a. Safe state b. Unsafe state c. Botha &b d. None of these

Last Answer : b. Unsafe state

Which is one of the important I/O devices and is most commonly used as permanent storage device in any processor: a. Soft disk b. Hard disk c. Botha &b d. None of these

Description : Which is one of the important I/O devices and is most commonly used as permanent storage device in any processor: a. Soft disk b. Hard disk c. Botha &b d. None of these

Last Answer : b. Hard disk

address is not assigned by linker. a. Absolute b. Relative c. Botha &b a None of these

Description : address is not assigned by linker. a. Absolute b. Relative c. Botha &b a None of these

Last Answer : a. Absolute

Modern assemblers for RISC based architectures make optimization of instruction scheduling to make use of CPU __ efficiently: a. Pipeline b. Without pipeline c. Botha &b d. None of these

Description : Modern assemblers for RISC based architectures make optimization of instruction scheduling to make use of CPU __ efficiently: a. Pipeline b. Without pipeline c. Botha &b d. None of these

Last Answer : a. Pipeline

Full form of MIPS assembler is: a. Microprocessor without interlocked pipeline stage b. Microprocessor with interlocked pipeline stage c. Botha &b d. None of these

Description : Full form of MIPS assembler is: a. Microprocessor without interlocked pipeline stage b. Microprocessor with interlocked pipeline stage c. Botha &b d. None of these

Last Answer : a. Microprocessor without interlocked pipeline stage

Ina complex program, the overlaps: a. Branching b. Condition c. Botha &b d. None of these

Description : Ina complex program, the overlaps: a. Branching b. Condition c. Botha &b d. None of these

Last Answer : a. Branching

Avoid crossing flow lines. a. Flowchart b. Algorithm c. Botha &b d. None of these

Description : Avoid crossing flow lines. a. Flowchart b. Algorithm c. Botha &b d. None of these

Last Answer : a. Flowchart

is useful to prepare detailed program documentation: a. Flowchart b. Algorithm c. Botha &b d. None of these

Description : is useful to prepare detailed program documentation: a. Flowchart b. Algorithm c. Botha &b d. None of these

Last Answer : a. Flowchart

Cache memory is located between main memory and : a. CPU b. Memory c. Botha &b d. None of these

Description : Cache memory is located between main memory and : a. CPU b. Memory c. Botha &b d. None of these

Last Answer : a. CPU

Return instruction is written in_ to written to main program: a. Subroutine b. Main program c. Botha &b d. None of these

Description : Return instruction is written in_ to written to main program: a. Subroutine b. Main program c. Botha &b d. None of these

Last Answer : a. Subroutine

subroutine declaration come after procedure announcement: a. Global b. Local c. Botha &b d. None of these

Description : subroutine declaration come after procedure announcement: a. Global b. Local c. Botha &b d. None of these

Last Answer : a. Global

Callis_ subroutine call. a. Conditional b. Unconditi c. Botha &b d. None of these

Description : Callis_ subroutine call. a. Conditional b. Unconditi c. Botha &b d. None of these

Last Answer : b. Unconditi

The processed data is sent for output to standard __ device which by default is computer screen: a. Input b. Output c. Botha &b d. None of these

Description : The processed data is sent for output to standard __ device which by default is computer screen: a. Input b. Output c. Botha &b d. None of these

Last Answer : b. Output

which of the following is interrupt mode. a. Task mode b. Executive mode c. Botha &b d. None of these

Description : which of the following is interrupt mode. a. Task mode b. Executive mode c. Botha &b d. None of these

Last Answer : b. Executive mode

A computer having writable control memory is known as_ a. Static micro programmable b. Dynamic micro programmable c. Botha & b d. None of these

Description : A computer having writable control memory is known as_ a. Static micro programmable b. Dynamic micro programmable c. Botha & b d. None of these

Last Answer : b. Dynamic micro programmable

function is used to transfer the control to end of a program which uses one argument( ) and takes value is zero for_ __ termination and non-zero for _termination: a. _ Exit( ) normal, abnormal b. Break, normal, abnormal Botha & b None of these

Description : function is used to transfer the control to end of a program which uses one argument( ) and takes value is zero for_ __ termination and non-zero for _termination: a. _ Exit( ) normal, abnormal b. Break, normal, abnormal Botha & b None of these

Last Answer : a. _ Exit( ) normal, abnormal

ASM-H widely used ___ assembler: a. 8§/370 b $/380 c. $/390 d. S/360

Description : ASM-H widely used ___ assembler: a. 8§/370 b $/380 c. $/390 d. S/360

Last Answer : a. 8§/370

One of use of microprogramming to implement _ ____ of processor in Intel 80x86 and Motorola 680x0 processors whose instruction set are evolved from 360 original. a. Control structure b. Without control c. Control unit d. Only control

Description : One of use of microprogramming to implement _ ____ of processor in Intel 80x86 and Motorola 680x0 processors whose instruction set are evolved from 360 original. a. Control structure b. Without control c. Control unit d. Only control

Last Answer : c. Control unit

Compared to hardware, firmware is _ __to design micro programmed organization: a. Difficult b. Easier c. Both a& b d. None of these

Description : Compared to hardware, firmware is _ __to design micro programmed organization: a. Difficult b. Easier c. Both a& b d. None of these

Last Answer : b. Easier

The function of these microinstructions is to issue the micro orders to_ _ a. CPU b. Memory c. Register d. Accumulator

Description : The function of these microinstructions is to issue the micro orders to_ _ a. CPU b. Memory c. Register d. Accumulator

Last Answer : a. CPU

The simplest method of controlling sequence of instruction execution is to have each instruction explicitly specify: a. The address of next instruction to be run b. Address of previous instruction c. Both a &b d. None of these

Description : The simplest method of controlling sequence of instruction execution is to have each instruction explicitly specify: a. The address of next instruction to be run b. Address of previous instruction c. Both a &b d. None of these

Last Answer : a. The address of next instruction to be run

Execution of instruction specified by instruction to perform: a. Operation b. Operands c. Both a &b d. None of these

Description : Execution of instruction specified by instruction to perform: a. Operation b. Operands c. Both a &b d. None of these

Last Answer : a. Operation

Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these

Description : Which memory is assembled between main memory and CPU: a. Primary memory b. Cache memory Cc. Botha & b d. None of these

Last Answer : b. Cache memory

getchar :: IO char in this given function what is indicated by IO char: a. when getchar is invoked it returns a character b. when getchar is executed it returns a character c. botha & b d. none of these

Description : getchar :: IO char in this given function what is indicated by IO char: a. when getchar is invoked it returns a character b. when getchar is executed it returns a character c. botha & b d. none of these

Last Answer : a. when getchar is invoked it returns a character

state keeps track of position related to execution of an instruction: a. Major b. Minor c. Botha & b d. None of these

Description : state keeps track of position related to execution of an instruction: a. Major b. Minor c. Botha & b d. None of these

Last Answer : a. Major

___ environment is beyond the control of the business. A. Internal. B. External. C. Micro. D. Macro.

Description : ___ environment is beyond the control of the business. A. Internal. B. External. C. Micro. D. Macro.

Last Answer : B. External.

IBM System/360 is A) Mainframe Computer B) Mini Computers C) Micro Computers D) None of above

Description : IBM System/360 is A) Mainframe Computer B) Mini Computers C) Micro Computers D) None of above

Last Answer : Answer : A

High level language C supports register transfer technique for _ application. a. Executing b. Compiling c. Both d. None

Description : High level language C supports register transfer technique for _ application. a. Executing b. Compiling c. Both d. None

Last Answer : a. Executing

END of macro definition by: a. NAME b. MEND c. DATA d. MEMORY

Description : END of macro definition by: a. NAME b. MEND c. DATA d. MEMORY

Last Answer : b. MEND

Process of replacing the sequence of lines of codes is known as: a. Expanding die macro b. Expanding tri macro c. Tetra macro d. None of these

Description : Process of replacing the sequence of lines of codes is known as: a. Expanding die macro b. Expanding tri macro c. Tetra macro d. None of these

Last Answer : a. Expanding die macro

The number of bit required to express and ___ are determined by the accuracy desired from the computing system . a. Exponent b. Mantissa ce. Both d. None f these

Description : The number of bit required to express and ___ are determined by the accuracy desired from the computing system . a. Exponent b. Mantissa ce. Both d. None f these

Last Answer : ce. Both

The hardware that does this isan ___ a. Error detecting decoder b. Error correcting decoder c. Both d. None of these

Description : The hardware that does this isan ___ a. Error detecting decoder b. Error correcting decoder c. Both d. None of these

Last Answer : b. Error correcting decoder

The processing speed of a computer depends on the ___ _of the system: a. Clock speed b. Motorola c. Cyrix d. None of these

Description : The processing speed of a computer depends on the ___ _of the system: a. Clock speed b. Motorola c. Cyrix d. None of these

Last Answer : a. Clock speed

The continue statement is used to transfer the control to the_ ___ of astatement block in a loop. a. End b. Beginning c. Middle d. None of these

Description : The continue statement is used to transfer the control to the_ ___ of astatement block in a loop. a. End b. Beginning c. Middle d. None of these

Last Answer : b. Beginning

___ mode of addressing is a form of implied addressing: a. Stack b. Array Cc. Queue d. ‘Binary

Description : ___ mode of addressing is a form of implied addressing: a. Stack b. Array Cc. Queue d. ‘Binary

Last Answer : a. Stack

Which operation are binary type, and are performed on bits string that is placed in register: a. Logical micro operation b. Arithmetic micro operation c. Both d. None

Description : Which operation are binary type, and are performed on bits string that is placed in register: a. Logical micro operation b. Arithmetic micro operation c. Both d. None

Last Answer : a. Logical micro operation

From1961-1964 John fairclough’s research played an important role to pursue full range of compatible computers as system: a. System/360 b System/460 c. System/560 d. System/780

Description : From1961-1964 John fairclough’s research played an important role to pursue full range of compatible computers as system: a. System/360 b System/460 c. System/560 d. System/780

Last Answer : a. System/360

Which micro operations carry information from one register to another. a. Register transfer b. Arithmetic c. Logical d. — Allof these

Description : Which micro operations carry information from one register to another. a. Register transfer b. Arithmetic c. Logical d. — Allof these

Last Answer : a. Register transfer

Micro operation is shown as: a. RI->R2 b. R1<-R2

Description : Micro operation is shown as: a. RI->R2 b. R1

Last Answer : b. R1

Arithmetic operation are carried by such micro operation on stored numeric data available in a. Register b. Data c. Both d. None

Description : Arithmetic operation are carried by such micro operation on stored numeric data available in a. Register b. Data c. Both d. None

Last Answer : a. Register

A micro operation every bit of a register is a: a. Constant b. Variable c. Both d. None

Description : A micro operation every bit of a register is a: a. Constant b. Variable c. Both d. None

Last Answer : b. Variable

Which operation is extremely useful in serial transfer of data: a. Logical micro operation b. Arithmetic micro operation c. Shift micro operation d. None of these

Description : Which operation is extremely useful in serial transfer of data: a. Logical micro operation b. Arithmetic micro operation c. Shift micro operation d. None of these

Last Answer : c. Shift micro operation

Which operation refer bitwise manipulation of contents of register: a. Logical micro operation b. Arithmetic micro operation c. Shift micro operation d. None of these

Description : Which operation refer bitwise manipulation of contents of register: a. Logical micro operation b. Arithmetic micro operation c. Shift micro operation d. None of these

Last Answer : a. Logical micro operation

Which symbol will be used to denote an micro operation. a. (*) b. (v) c. Both d. None

Description : Which symbol will be used to denote an micro operation. a. (*) b. (v) c. Both d. None

Last Answer : b. (v)

For each micro operation the control unit generates set of_ signals. a. Control b. Address c. Data d. None of these

Description : For each micro operation the control unit generates set of_ signals. a. Control b. Address c. Data d. None of these

Last Answer : a. Control